EPM9320RI208-20 vs EPM9320RI208-10N 比較

詳細並排比較 EPM9320RI208-20 由 Intel 與 EPM9320RI208-10N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

Altera
EPM9320RI208-10N EPM9320RI208-10N - MAX 9000 CPLD 320 Macro Cells | Altera

EPM9320RI208-10N - MAX 9000 CPLD 320 Macro Cells | Altera

EPM9320RI208-10N ✓ 啟用中

規格比較

參數 EPM9320RI208-20 EPM9320RI208-10N
品牌 Intel Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete 啟用中
Family MAX 9000 MAX 9000
Device Type CPLD (Complex Programmable Logic Device) Complex Programmable Logic Device (CPLD)
Macrocells 320 —
Usable Gates 6,000 6,000
Propagation Delay (tPD) 20 ns —
Maximum Operating Frequency 100 MHz —
Supply Voltage (VCC) 5.0 V —
Logic Elements / LABs 20 Logic Array Blocks (16 macro cells each) —
Programmable Interconnect Programmable Interconnect Array (PIA) —
In-System Programmability Yes - IEEE 1149.1 JTAG, 5.0-V ISP Yes (JTAG/ISP)
Dedicated Input Pins 4 (low-skew global) —
User I/O Pins [DATA_NEEDED: I/O pin count for 208-pin RQFP] 160
封裝 208-pin RQFP (Power Quad Flat Pack) 208-pin RQFP (PowerQuad II)
Operating Temperature Grade Industrial —
Technology CMOS EEPROM —
安裝類型 Surface Mount Surface Mount
MSL 等級 [DATA_NEEDED: MSL rating] [DATA_NEEDED: MSL level]
RoHS 狀態 [DATA_NEEDED: RoHS compliance] Compliant (N suffix = lead-free)
Macro Cells — 320
Logic Array Blocks (LABs) — 20
Pin-to-Pin Propagation Delay (tPD) — 10 ns
Maximum System Clock Frequency — 100 MHz
供應電壓 — 5 V
I/O Voltage — 5 V
Configuration Memory — EEPROM (non-volatile)
工作溫度範圍 — -40C to +85C (industrial)
Lead Finish — Lead-free (matte tin)

資料表與資源

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