EPM9560ARC208-10 vs EPM9560RC208-10 比較
詳細並排比較 EPM9560ARC208-10 由 Intel 與 EPM9560RC208-10 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM9560ARC208-10 | EPM9560RC208-10 |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Device Family | MAX 9000A (Multiple Array MatriX) | — |
| Programmable Logic Type | CPLD (Complex Programmable Logic Device) | — |
| Usable Gates | 12,000 gates | 12,000 |
| Macrocells | 560 macrocells | 560 |
| Logic Array Blocks | 35 LABs | — |
| User I/O Pins | 153 I/O | — |
| Propagation Delay (tPD) | 10 ns (speed grade -10) | — |
| Internal Frequency | 144.9 MHz | — |
| 供應電壓 | 5.0 V | — |
| Logic Family | CMOS | — |
| Configuration Technology | EEPROM (non-volatile, in-system programmable) | — |
| JTAG Interface | IEEE 1149.1 boundary-scan (ISP) | — |
| 工作溫度 | 0 C to +70 C (commercial) | 0C to +70C (commercial) |
| 封裝 | 208-pin RQFP (PowerQuad Flat Pack) with exposed pad | 208-pin RQFP (Plastic Quad Flat Pack) |
| 安裝類型 | Surface Mount | Surface Mount |
| RoHS 狀態 | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: not stated in retrieved distributor listings] |
| 腳位數 | 208 pins | — |
| Family | — | MAX 9000 |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Logic Array Blocks (LABs) | — | 16 |
| Maximum User I/O Pins | — | 212 (208-pin package variant) |
| Pin-to-Pin Delay (tPD) | — | 10 ns |
| Maximum Frequency (fMAX) | — | [DATA_NEEDED: internal toggle frequency in MHz] |
| Supply Voltage (VCCINT) | — | 5.0 V |
| I/O Standards Supported | — | 5.0 V TTL, 3.3 V LVTTL, 2.5 V (multiVolt I/O) |
| Configuration Memory | — | EEPROM (in-system programmable via JTAG) |
| Process Technology | — | 0.30 µm CMOS EEPROM |
| Lead-Free | — | [DATA_NEEDED: confirm lead-free status -10 suffix is conventional Pb-containing] |
| Programmability | — | JTAG (IEEE 1149.1) in-system programming |