EPM9560RC208-15C vs EPM9560RC208-7N 比較
詳細並排比較 EPM9560RC208-15C 由 Altera 與 EPM9560RC208-7N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM9560RC208-15C | EPM9560RC208-7N |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | 最後購買 |
| Family | MAX 9000 | MAX 9000 |
| Device Type | EEPROM-based CPLD (EPLD) | — |
| Usable Gates | 12,000 | [DATA_NEEDED: usable gate count] |
| Macrocells | 560 | — |
| User I/O Pins | 149 | — |
| Propagation Delay (tPD) | 15 ns | 7 ns (speed grade -7) |
| Maximum Counter Frequency | 117.6 MHz | — |
| Supply Voltage Range | 4.75 V to 5.25 V | — |
| Nominal Supply Voltage | 5.0 V | — |
| I/O Voltage Compatibility | 3.3 V or 5 V | — |
| Configuration Memory | EEPROM (non-volatile) | — |
| In-System Programmability | Yes, via IEEE Std. 1149.1 JTAG | — |
| 封裝 | 208-pin RQFP | RQFP-208 (Power Quad Flat Pack) |
| 安裝類型 | Surface Mount | Surface Mount |
| 工作溫度範圍 | 0C to +70C (commercial) | — |
| Speed Grade | -15 (15 ns) | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS status] | Compliant (Pb-free, N suffix) |
| Logic Architecture | Multiple Array MatriX (MAX) third generation | — |
| Device | — | EPM9560 |
| Logic Elements / Macrocells | — | [DATA_NEEDED: macrocell count] |
| 腳位數 | — | 208 |
| User I/O | — | [DATA_NEEDED: user I/O count] |
| Process Technology | — | 0.65 micron CMOS EEPROM |
| Programmability | — | In-system / EEPROM-based |
| 供應電壓 | — | 5 V (VCC, typical for MAX 9000) |
| 工作溫度 | — | [DATA_NEEDED: commercial or industrial grade] |
| Lead-Free | — | Yes (N suffix) |
| Manufacturer | — | Intel (formerly Altera) |