EPM9560RC208-20N vs EPM9560RC208-20 比較
詳細並排比較 EPM9560RC208-20N 由 Intel 與 EPM9560RC208-20 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM9560RC208-20N | EPM9560RC208-20 |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Device Family | MAX 9000 (EPM9560) | MAX 9000 (EPM9560) |
| Macrocells | 560 | 560 |
| Usable Gates | 12,000 | 12,000 |
| Propagation Delay (tPD) | 20 ns | — |
| 封裝 | 208-pin RQFP (PowerQuad Flat Pack) | 208-pin RQFP (28x28 mm) |
| User I/O Pins | 149 | 153 |
| 供應電壓 | 5.0 V | 5.0 V |
| Configuration Technology | EEPROM (non-volatile) | EEPROM (non-volatile) |
| In-System Programmability | Yes, via IEEE Std. 1149.1 JTAG | Yes, via IEEE Std. 1149.1 JTAG |
| JTAG Interface | IEEE Std. 1149.1 | — |
| 安裝類型 | Surface Mount | Surface Mount |
| 工作溫度 | [DATA_NEEDED: operating temperature range] | 0C to +70C (commercial) |
| RoHS 狀態 | Lead-free (N suffix) | [DATA_NEEDED: RoHS status] |
| Logic Architecture | Multiple Array MatriX (MAX), third-generation CMOS EEPROM | — |
| Flip-Flops | 772 (per EPM9560 series data) | 772 |
| Speed Grade | -20 (20 ns) | — |
| MSL 等級 | [DATA_NEEDED: MSL level] | [DATA_NEEDED: MSL level] |
| Logic Array Blocks | — | 35 |
| Pin-to-Pin Delay (tPD) | — | 20 ns |
| 最大時脈頻率 | — | 100 MHz |
| I/O Standards | — | 5.0 V TTL/CMOS compatible |