EPM9560RC240-10 vs EPM9560RC240-10N 比較

詳細並排比較 EPM9560RC240-10 由 Altera 與 EPM9560RC240-10N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

Intel
EPM9560RC240-10N EPM9560RC240-10N - MAX 9000 CPLD 560 Macrocells 5V 240-Pin RQFP | Intel

EPM9560RC240-10N - MAX 9000 CPLD 560 Macrocells 5V 240-Pin RQFP | Intel

EPM9560RC240-10N ⚠ 最後購買機會

規格比較

參數 EPM9560RC240-10 EPM9560RC240-10N
品牌 Altera Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete 最後購買
Device Type Complex Programmable Logic Device (CPLD) —
Family MAX 9000 MAX 9000
Usable Gates 12,000 gates 12,000
Macro Cells 560 —
Logic Array Blocks (LABs) 12 16
Maximum System Frequency 144.9 MHz —
Pin-to-Pin Propagation Delay 10 ns —
供應電壓 5 V 5.0 V
Technology CMOS EEPROM —
封裝 240-pin RQFP (PowerQuad) 240-pin RQFP (Plastic Quad Flat Pack)
User I/O Pins 192 —
安裝類型 Surface Mount —
工作溫度 0C to +70C (commercial) —
濕度敏感等級 (MSL) 3 (168 Hours) 3 (168 hours)
RoHS 狀態 ROHS3 Compliant ROHS3 Compliant (per fpgalink.com listing)
Configuration Memory Non-volatile EEPROM (instant-on) —
Manufacturer Standard Lead Time 1-7 Days (distributor stock) —
Architecture — Multiple Array MatriX (MAX) - 3rd generation
Macrocells — 560
User I/Os — 212
Internal Operating Frequency — 144.9 MHz
Pin-to-Pin Propagation Delay (tPD) — 10 ns (-10 speed grade)
Process Technology — 0.65 µm CMOS EEPROM
Programming Interface — JTAG (IEEE 1149.1) - in-system programmable
I/O Standards Supported — 5.0 V TTL/CMOS, 3.3 V PCI-compatible
Operating Temperature (Commercial) — 0 °C to +70 °C
Lead-Free Finish (N suffix) — Yes (Pb-free)

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