EPM9560RC240-10N vs EPM9560RC240-20 比較
詳細並排比較 EPM9560RC240-10N 由 Intel 與 EPM9560RC240-20 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Intel
EPM9560RC240-10N - MAX 9000 CPLD 560 Macrocells 5V 240-Pin RQFP | Intel
EPM9560RC240-10N ⚠ 最後購買機會Intel
EPM9560RC240-20 - MAX 9000 CPLD, 560 Macrocells, 5V, 240-RQFP | Intel
EPM9560RC240-20 Obsolete規格比較
| 參數 | EPM9560RC240-10N | EPM9560RC240-20 |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 最後購買 | Obsolete |
| Family | MAX 9000 | MAX 9000 |
| Architecture | Multiple Array MatriX (MAX) - 3rd generation | — |
| Usable Gates | 12,000 | — |
| Macrocells | 560 | — |
| Logic Array Blocks (LABs) | 16 | — |
| User I/Os | 212 | — |
| Internal Operating Frequency | 144.9 MHz | — |
| Pin-to-Pin Propagation Delay (tPD) | 10 ns (-10 speed grade) | — |
| 供應電壓 | 5.0 V | — |
| Process Technology | 0.65 µm CMOS EEPROM | — |
| 封裝 | 240-pin RQFP (Plastic Quad Flat Pack) | — |
| Programming Interface | JTAG (IEEE 1149.1) - in-system programmable | JTAG (IEEE 1149.1), Altera proprietary |
| I/O Standards Supported | 5.0 V TTL/CMOS, 3.3 V PCI-compatible | — |
| Operating Temperature (Commercial) | 0 °C to +70 °C | — |
| Lead-Free Finish (N suffix) | Yes (Pb-free) | — |
| RoHS 狀態 | ROHS3 Compliant (per fpgalink.com listing) | — |
| 濕度敏感等級 (MSL) | 3 (168 hours) | — |
| Series | — | MAX 9000 PLD Family |
| Programmable Type | — | In System Programmable |
| Number of Macrocells | — | 560 |
| Number of Gates | — | 12,000 |
| Number of Logic Elements/Blocks | — | 35 LABs |
| Number of User I/Os | — | 191 |
| Propagation Delay (tPD max) | — | 20 ns |
| Maximum Internal Frequency | — | 100 MHz |
| Supply Voltage (VCCINT) | — | 4.75 V to 5.25 V |
| Technology | — | CMOS, EEPROM-based |
| 工作溫度 | — | 0C to 70C (Commercial) |
| 安裝類型 | — | Surface Mount |
| 封裝 / 外殼 | — | 240-BFQFP Exposed Pad (RQFP-240) |
| Supplier Device Package | — | 240-RQFP |
| Product Status | — | Obsolete |
| Lead-Free / RoHS | — | [DATA_NEEDED: RoHS status for this lot] |