EPM9560RC240-15YY vs EPM9560RC240-3 比較
詳細並排比較 EPM9560RC240-15YY 由 Intel 與 EPM9560RC240-3 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM9560RC240-15YY | EPM9560RC240-3 |
|---|---|---|
| 品牌 | Intel | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | NRND | Obsolete |
| Family | MAX 9000A | MAX 9000 |
| Logic Type | CMOS EEPROM-based CPLD | — |
| Number of Macrocells | 560 | — |
| Usable Gates | 12,000 | 12000 |
| Number of User I/O | 191 | — |
| Maximum Operating Frequency | 117.6 MHz | [DATA_NEEDED: fMAX] |
| Propagation Delay (tpd) | 15 ns | — |
| Supply Voltage (VCC) | 5.0 V | — |
| Programmability | In-system via IEEE 1149.1 (JTAG) | — |
| Package Type | RQFP-240 (Plastic Quad Flat Pack) | — |
| 安裝類型 | Surface Mount | Surface Mount |
| 工作溫度 | 0 C to +70 C (commercial) | — |
| Speed Grade | -15 | — |
| Logic Array Blocks (LABs) | [DATA_NEEDED: LAB count for EPM9560] | 20 |
| RoHS 狀態 | Non-RoHS (YY suffix indicates non-compliant / matte tin or SnPb lead finish per Altera legacy convention) | [DATA_NEEDED: RoHS] |
| Device Type | — | Complex Programmable Logic Device (CPLD) |
| Macrocells | — | 560 |
| Pin-to-Pin Propagation Delay | — | 3 ns (speed grade -3) |
| Supply Voltage (VCCINT) | — | 5 V |
| Supply Voltage (VCCIO) | — | 5 V |
| User I/O Pins | — | 192 |
| 封裝 | — | 240-pin RQFP (PowerQuad II) |
| Configuration Memory | — | EEPROM (non-volatile) |
| 工作溫度範圍 | — | 0C to +70C (commercial) |
| Lead Finish | — | [DATA_NEEDED: lead finish] |
| MSL 等級 | — | [DATA_NEEDED: MSL] |
| JTAG Support | — | [DATA_NEEDED: JTAG] |