EPM9560RC304-15N vs EPM9560RC-304 比較
詳細並排比較 EPM9560RC304-15N 由 Altera 與 EPM9560RC-304 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM9560RC304-15N | EPM9560RC-304 |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | MAX 9000 | MAX 9000 |
| Product Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Architecture | Multiple Array MatriX (MAX) - 3rd generation | — |
| Usable Gates | 12,000 | 12,000 |
| Macrocells | 560 | 560 |
| Logic Array Blocks (LABs) | 16 (estimated from 560 macrocells) | 35 |
| Maximum Operating Frequency (fMAX) | 117.6 MHz | — |
| Pin-to-Pin Propagation Delay | 15 ns (-15 speed grade) | — |
| Supply Voltage (VCCINT) | 5 V | 5.0 V |
| 封裝 | RQFP-304 | 304-pin RQFP / PQFP-G304 |
| User I/O Count | 304 (package-level) | — |
| Process Technology | High-performance CMOS EEPROM | CMOS EEPROM |
| In-System Programmability | Yes (IEEE 1149.1 JTAG) | — |
| Operating Temperature Grade | Commercial (suffix N) | — |
| RoHS 狀態 | Compliant (lead-free per suffix N marking) | [DATA_NEEDED: RoHS compliance status] |
| Flip-Flops | — | 772 |
| User I/O Pins | — | 216 |
| JEDEC Package Code | — | S-PQFP-G304 |
| MultiVolt I/O Support | — | 3.3 V / 5 V |
| Maximum Frequency (-15 grade) | — | 117.6 MHz |
| Propagation Delay (-12 grade) | — | 13.4 ns |
| Propagation Delay (-15 grade) | — | 15 ns |
| In-System Programming | — | Yes (IEEE 1149.1 JTAG) |
| Operating Temperature (Commercial) | — | 0C to +70C |
| 安裝類型 | — | Surface Mount |