EPM9560RC304-15N vs EPM9560RC304-15 比較
詳細並排比較 EPM9560RC304-15N 由 Altera 與 EPM9560RC304-15 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM9560RC304-15N | EPM9560RC304-15 |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | MAX 9000 | — |
| Product Type | CPLD (Complex Programmable Logic Device) | — |
| Architecture | Multiple Array MatriX (MAX) - 3rd generation | Multiple Array MatriX (MAX), EEPROM-based |
| Usable Gates | 12,000 | — |
| Macrocells | 560 | 560 |
| Logic Array Blocks (LABs) | 16 (estimated from 560 macrocells) | 16 |
| Maximum Operating Frequency (fMAX) | 117.6 MHz | — |
| Pin-to-Pin Propagation Delay | 15 ns (-15 speed grade) | — |
| Supply Voltage (VCCINT) | 5 V | 5.0 V |
| 封裝 | RQFP-304 | 304-pin RQFP (Plastic Quad Flat Pack) |
| User I/O Count | 304 (package-level) | — |
| Process Technology | High-performance CMOS EEPROM | — |
| In-System Programmability | Yes (IEEE 1149.1 JTAG) | Yes, via IEEE Std. 1149.1 JTAG |
| Operating Temperature Grade | Commercial (suffix N) | — |
| RoHS 狀態 | Compliant (lead-free per suffix N marking) | [DATA_NEEDED: lead-free / RoHS compliance status] |
| Device Family | — | MAX 9000 |
| User I/O Pins | — | 212 (maximum) |
| Propagation Delay (tPD) | — | 15 ns (combinatorial, pin-to-pin) |
| 腳位數 | — | 304 |
| I/O Standard | — | 5.0 V TTL / PCI-compliant |
| Configuration Memory | — | On-chip EEPROM (non-volatile) |
| Technology Node | — | High-performance CMOS, EEPROM process |
| 工作溫度 | — | [DATA_NEEDED: industrial/commercial temperature grade] |
| 安裝類型 | — | Surface Mount |