EPM9560RC304-15N vs EPM9560RC304-15C 比較
詳細並排比較 EPM9560RC304-15N 由 Altera 與 EPM9560RC304-15C 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Altera
EPM9560RC304-15C - 560 Macro Cell MAX 9000 CPLD 117.6MHz 5V | Altera
EPM9560RC304-15C Obsolete規格比較
| 參數 | EPM9560RC304-15N | EPM9560RC304-15C |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | MAX 9000 | MAX 9000 |
| Product Type | CPLD (Complex Programmable Logic Device) | — |
| Architecture | Multiple Array MatriX (MAX) - 3rd generation | Multiple Array MatriX (MAX), 3rd generation |
| Usable Gates | 12,000 | 12,000 |
| Macrocells | 560 | — |
| Logic Array Blocks (LABs) | 16 (estimated from 560 macrocells) | 16 |
| Maximum Operating Frequency (fMAX) | 117.6 MHz | — |
| Pin-to-Pin Propagation Delay | 15 ns (-15 speed grade) | — |
| Supply Voltage (VCCINT) | 5 V | — |
| 封裝 | RQFP-304 | 304-pin RQFP |
| User I/O Count | 304 (package-level) | — |
| Process Technology | High-performance CMOS EEPROM | CMOS EEPROM |
| In-System Programmability | Yes (IEEE 1149.1 JTAG) | Yes (IEEE 1149.1 JTAG) |
| Operating Temperature Grade | Commercial (suffix N) | — |
| RoHS 狀態 | Compliant (lead-free per suffix N marking) | [DATA_NEEDED: RoHS status] |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Macro Cells | — | 560 |
| User I/O Pins (maximum) | — | 212 |
| Maximum Operating Frequency | — | 117.6 MHz |
| Pin-to-Pin Propagation Delay (tPD) | — | 15 ns |
| 供應電壓 | — | 5.0 V |
| Program/Erase Endurance | — | 100 cycles minimum |
| 安裝類型 | — | Surface Mount |
| 工作溫度 | — | 0 C to +70 C (Commercial) |