EPM9560RC304-2 vs EPM9560RC304-10 比較
詳細並排比較 EPM9560RC304-2 由 Intel 與 EPM9560RC304-10 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Intel
EPM9560RC304-2 - MAX 9000 EPLD 12k Gates 304-pin RQFP | Intel / Altera
EPM9560RC304-2 Obsolete規格比較
| 參數 | EPM9560RC304-2 | EPM9560RC304-10 |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | NRND |
| Family | MAX 9000 | MAX 9000 |
| Device Type | CPLD (EPLD - Erasable PLD) | CPLD / EPLD |
| Usable Gates | Approximately 12,000 | 16000 |
| Logic Array Blocks (LABs) | 16 | — |
| Macrocells | [DATA_NEEDED: macrocell count] | 560 |
| User I/O Pins | 304 | 304 (package-limited) |
| 封裝 | 304-pin RQFP (RC) | RQFP-304 (RC) |
| Speed Grade | -2 | -10 |
| Core Supply Voltage | 5.0 V | — |
| I/O Supply Voltage | 5.0 V | — |
| Programming Technology | EEPROM (in-system programmable) | — |
| JTAG Support | IEEE Std. 1149.1 (boundary-scan + ISP) | — |
| 工作溫度 | Commercial (0C to +70C) | [DATA_NEEDED: operating temperature range] |
| 安裝類型 | Surface Mount | Surface Mount |
| RoHS 狀態 | [DATA_NEEDED: RoHS compliance status] | ROHS3 Compliant |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Architecture | Multiple Array MatriX (MAX) - third generation | — |
| Configuration Memory | On-chip EEPROM (non-volatile) | — |
| Logic Elements | — | 560 |
| 腳位數 | — | 304 |
| Pin-to-Pin Propagation Delay | — | 12 ns |
| 供應電壓 | — | 5 V |
| JTAG / Boundary Scan | — | IEEE 1149.1 compliant |
| Programming Method | — | JTAG in-system (ISP) |
| Process Technology | — | 0.65 µm CMOS EEPROM |
| MSL 等級 | — | 3 (168 Hours) |