EPM9560RC304-20C vs EPM9560RC304-10 比較
詳細並排比較 EPM9560RC304-20C 由 Altera 與 EPM9560RC304-10 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Altera
EPM9560RC304-20C - MAX 9000 CPLD, 560 Macrocells, 5V | Intel / Altera
EPM9560RC304-20C Obsolete規格比較
| 參數 | EPM9560RC304-20C | EPM9560RC304-10 |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | NRND |
| Family | MAX 9000 | MAX 9000 |
| Device Series | EPM9560 | — |
| Product Type | CPLD (Complex Programmable Logic Device) | — |
| Usable Gates | 12,000 | 16000 |
| Macrocells | 560 | 560 |
| Logic Array Blocks (LABs) | 16 | — |
| Maximum User I/O Pins | 212 | — |
| fMAX (Internal) | 100 MHz | — |
| Pin-to-Pin Delay (tPD) | 20 ns (speed grade -20) | — |
| Core Supply Voltage | 5.0 V | — |
| I/O Logic Level | 3.3 V or 5 V (configurable) | — |
| Programming Technology | EEPROM (in-system programmable) | — |
| Programming Interface | IEEE Std. 1149.1 JTAG | — |
| 工作溫度 | 0 C to +70 C (commercial) | [DATA_NEEDED: operating temperature range] |
| 封裝 | 304-pin RQFP | RQFP-304 (RC) |
| 安裝類型 | Surface Mount | Surface Mount |
| RoHS 狀態 | [DATA_NEEDED: rohs status] | ROHS3 Compliant |
| Device Type | — | CPLD / EPLD |
| Logic Elements | — | 560 |
| 腳位數 | — | 304 |
| Pin-to-Pin Propagation Delay | — | 12 ns |
| Speed Grade | — | -10 |
| 供應電壓 | — | 5 V |
| User I/O Pins | — | 304 (package-limited) |
| JTAG / Boundary Scan | — | IEEE 1149.1 compliant |
| Programming Method | — | JTAG in-system (ISP) |
| Process Technology | — | 0.65 µm CMOS EEPROM |
| MSL 等級 | — | 3 (168 Hours) |