EPM9560TC208-20 vs EPM9560RI208-20 比較
詳細並排比較 EPM9560TC208-20 由 Altera 與 EPM9560RI208-20 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM9560TC208-20 | EPM9560RI208-20 |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | NRND |
| Device Family | MAX 9000 | — |
| Macrocells | 560 | — |
| Usable Gates | 12000 | 12,000 |
| User I/O | 149 | — |
| Propagation Delay (tPD) | 20 ns | — |
| Speed Grade | -20 | — |
| 封裝 | TQFP-208 (TC208) | 208-pin RQFP (Power-Quad Flat Pack) 28x28 mm |
| Pin/Package Code | TC208 (JEDEC S-PQFP-G208) | — |
| Architecture | Multiple Array MatriX (MAX) - third generation | Multiple Array MatriX (MAX) - third generation |
| Technology | CMOS EEPROM | — |
| Core Supply Voltage | 5 V | — |
| I/O Supply Voltage (MultiVolt) | 3.3 V or 5 V | — |
| In-System Programming | Yes (IEEE Std 1149.1 JTAG) | — |
| Flip-Flops | 772 | — |
| 工作溫度 | [DATA_NEEDED: commercial/industrial temperature grade] | [DATA_NEEDED: operating temperature range grade] |
| 安裝類型 | Surface Mount | Surface Mount |
| RoHS 狀態 | unknown | [DATA_NEEDED: RoHS compliance status] |
| Family | — | MAX 9000 |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Macro Cells | — | 560 |
| Logic Array Blocks (LABs) | — | 16 |
| Maximum User I/O Pins | — | 212 |
| Pin-to-Pin Propagation Delay (tPD) | — | 20 ns |
| Counter Frequency (fCNT) | — | 100 MHz |
| Supply Voltage (VCC) | — | 5.0 V |
| Process Technology | — | CMOS EEPROM |
| In-System Programmability | — | Yes (IEEE Std. 1149.1 JTAG) |