EPM9560WC208 vs EPM9560WI208-20 比較
詳細並排比較 EPM9560WC208 由 Altera 與 EPM9560WI208-20 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM9560WC208 | EPM9560WI208-20 |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | NRND | NRND |
| Family | MAX 9000 | — |
| Device Type | EE Programmable Logic Device (CPLD) | EE PLD / Complex Programmable Logic Device (CPLD) |
| Macrocells | 560 | — |
| Logic Array Blocks (LABs) | 35 | 16 |
| Flip-Flops | 772 | — |
| Maximum User I/O | 149 | — |
| 最大時脈頻率 | 117.6 MHz | — |
| Propagation Delay (tpd, -15 grade) | 16.6 ns | — |
| 供應電壓 | 3.3 V or 5 V | — |
| Process Technology | CMOS, electrically erasable | 0.35 micron CMOS EEPROM |
| 封裝 | 208-pin CQFP (Ceramic Quad Flat Pack) | — |
| Terminal Pitch | 0.50 mm | — |
| 安裝類型 | Surface Mount | Surface Mount |
| Programming Interface | IEEE 1149.1 JTAG | — |
| Configuration Memory | Non-volatile EE (instant-on) | — |
| Hot Socketing Support | Yes | — |
| MSL 等級 | [DATA_NEEDED: MSL level] | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS compliance] | — |
| Device Family | — | MAX 9000 |
| Macrocells / Logic Cells | — | 560 |
| Maximum User I/O Pins | — | 212 |
| Pin-to-Pin Propagation Delay (tPD) | — | 23.6 ns |
| Speed Grade | — | -20 |
| Programmability | — | In-system via JTAG (IEEE 1149.1) |
| Package Type | — | CQFP-208 (Ceramic Quad Flat Pack) |
| Terminal Form | — | Gull Wing |
| Number of Terminals | — | 208 |
| Package Code | — | QFP |
| Package Shape | — | Square |
| Operating Temperature Grade | — | Industrial |
| Design Tools | — | MAX+PLUS II, Quartus |
| Compliance | — | [DATA_NEEDED: RoHS status] |