ISO6760FDWR vs ISO6760DWR 比較
詳細並排比較 ISO6760FDWR 由 Texas Instruments 與 ISO6760DWR 由 Texas Instruments. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Texas Instruments
ISO6760DWR - 6-Channel 50Mbps Digital Isolator | Texas Instruments
ISO6760DWR ✓ 啟用中規格比較
| 參數 | ISO6760FDWR | ISO6760DWR |
|---|---|---|
| 品牌 | Texas Instruments | Texas Instruments |
| 類別 | Interface ICs | Interface ICs |
| 生命週期狀態 | 啟用中 | 啟用中 |
| Isolation Type | Capacitive SiO2 Reinforced | — |
| 通道數 | 6 (6/0 direction) | — |
| 資料速率 | 50 Mbps | — |
| Isolation Rating (RMS) | 5000 Vrms | — |
| Working Voltage | 1500 Vrms (high lifetime) | — |
| Surge Withstand | 10 kV | — |
| CMTI (Common-Mode Transient Immunity) | ±150 kV/us typical | — |
| Supply Voltage Side 1 (VCC1) | 1.71 V to 1.89 V (1.8 V logic) | — |
| Supply Voltage Side 2 (VCC2) | 2.25 V to 5.5 V | — |
| Quiescent Current per Channel (1 Mbps) | 1.5 mA typ | — |
| Propagation Delay | 11 ns typical | [DATA_NEEDED: propagation delay] |
| 封裝 | 16-SOIC (DW), 0.295" / 7.50 mm width wide-body | 16-SOIC (DW), 0.295 inch width |
| 工作溫度 | -40 C to +125 C | -40 °C to +125 °C |
| MSL 等級 | Level-2, 260 C, 1 year | — |
| Supported Protocols | CAN, RS-232, RS-485, SPI, UART, I2C | — |
| RoHS / REACH | ROHS3 Compliant / REACH [DATA_NEEDED] | — |
| Default Output State | High (F suffix) | — |
| Channel Count | — | 6 |
| Channel Direction | — | 6/0, all forward |
| Maximum Data Rate | — | 50 Mbps |
| Isolation Voltage | — | 5000 Vrms |
| Common-Mode Transient Immunity | — | 100 kV/µs |
| Logic Compatibility | — | 1.8 V logic support |
| Product Type | — | General-purpose reinforced digital isolator |
| 腳位數 | — | 16 |
| 安裝類型 | — | Surface Mount |
| 供應電壓 | — | [DATA_NEEDED: supply voltage range] |
| 靜態電流 | — | [DATA_NEEDED: quiescent current] |
| CMTI | — | 100 kV/µs |
| RoHS 狀態 | — | [DATA_NEEDED: RoHS status] |
| REACH Status | — | [DATA_NEEDED: REACH status] |
| AEC-Q100 Qualification | — | [DATA_NEEDED: automotive qualification status] |
| Isolation Class | — | Reinforced |
| Logic Levels | — | [DATA_NEEDED: input and output logic levels] |