K4AAG085WA-BCRC vs K4AAG085WA-BCPB 比較
詳細並排比較 K4AAG085WA-BCRC 由 Samsung Electronics 與 K4AAG085WA-BCPB 由 Samsung Electronics. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | K4AAG085WA-BCRC | K4AAG085WA-BCPB |
|---|---|---|
| 品牌 | Samsung Electronics | Samsung Electronics |
| 類別 | DRAM | Memory ICs |
| 生命週期狀態 | 啟用中 | 啟用中 |
| 記憶體類型 | DDR4 SDRAM | DDR4 SDRAM |
| Density | 16 Gbit | 16 Gbit |
| 組織 | 2G x 8 | 2G x 8 |
| 供應電壓 | 1.2 V | 1.2 V |
| 介面 | Parallel, DDR4 | Parallel (DDR4) |
| 封裝 | 78FBGA (78-ball Fine-Pitch Ball Grid Array) | 78FBGA |
| 工作溫度 | 0C to +85C | 0 C to 85 C (commercial grade, per K4AAG085WA family data) |
| 安裝類型 | Surface Mount | Surface Mount |
| Data Width | 8 bit | — |
| Generation | DDR4 | — |
| Speed Grade Suffix | BCRC | — |
| Maximum Data Rate | [DATA_NEEDED: maximum data rate (Mbps) for BCRC speed grade] | — |
| CAS 延遲 | [DATA_NEEDED: CAS latency for BCRC speed grade] | — |
| On-Die Termination | Yes (DDR4 ODT) | — |
| Refresh | Self-refresh and auto-refresh (DDR4 standard) | — |
| RoHS 狀態 | Compliant | Compliant (per family listing on JLCPCB) |
| Family | K4AAG085WA (16Gb 2Gx8 DDR4 family) | — |
| Speed Grade | — | [DATA_NEEDED: speed grade Mbps for BCPB suffix] |
| Clock Type | — | Synchronous, differential clock |
| Bank Architecture | — | DDR4 bank group architecture |
| DLL Mode | — | DLL Enabled mode operation (per Samsung datasheet abstract) |
| Memory Format | — | DRAM |
| Temperature Grade Code | — | C (per Samsung part number coding) |
| Speed Bin Code | — | PB (per Samsung part number coding) |