KAD2708L-35Q68 vs KAD2708L-21Q68 比較
詳細並排比較 KAD2708L-35Q68 由 Renesas Electronics 與 KAD2708L-21Q68 由 Renesas Electronics. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Renesas Electronics
KAD2708L-35Q68 - 8-bit, 350MSPS Single-Channel ADC | Renesas
KAD2708L-35Q68 ✓ 啟用中Renesas Electronics
KAD2708L-21Q68 - 8-bit 210MSPS LVCMOS ADC, 68-QFN | Renesas
KAD2708L-21Q68 ✓ 啟用中規格比較
| 參數 | KAD2708L-35Q68 | KAD2708L-21Q68 |
|---|---|---|
| 品牌 | Renesas Electronics | Renesas Electronics |
| 類別 | ADC/DAC | ADC/DAC |
| 生命週期狀態 | 啟用中 | 啟用中 |
| 解析度 | 8 bits | 8 bit |
| Sample Rate (max) | 350 MSPS | — |
| Number of Channels | 1 (single-channel) | 1 |
| Architecture | Pipelined, FemtoCharge CMOS | Pipelined (FemtoCharge™ technology) |
| Input Voltage Range (Differential) | 1.5 VP-P | — |
| Analog Input Bandwidth | 600 MHz | — |
| SNR (fIN = 175 MHz) | 48.8 dBFS | — |
| Power Consumption (typ) | < 330 mW | — |
| Digital Output Interface | LVCMOS, parallel | — |
| Output Coding | Two's complement | — |
| AVDD2 Supply | 1.8 V | — |
| AVDD3 Supply | 3.3 V | — |
| Internal Reference | Yes (on-chip) | — |
| Track-and-Hold | Internal | — |
| Clock Divider | Selectable divide-by-2 | — |
| Over-Range Indicator | Yes | Yes |
| 工作溫度範圍 | -40 °C to +85 °C | [DATA_NEEDED: industrial/extended range] |
| 封裝 | 68-Ld QFN (10 mm × 10 mm) with exposed paddle | 68-QFN (10x10 mm) |
| 安裝類型 | Surface Mount | Surface Mount |
| RoHS 狀態 | Compliant (Pb-free matte tin plate) | Compliant |
| MSL 等級 | Per datasheet TB363 | — |
| 取樣率 | — | 210 MSPS |
| Digital Output Type | — | LVCMOS |
| Input Clock Divider | — | Selectable divide-by-2 |
| Analog Supply Voltage (AVDD2) | — | 1.8 V |
| Digital Supply Voltage (AVDD3) | — | 3.3 V |
| Power Consumption | — | [DATA_NEEDED: power at 210 MSPS in mW] (< 330 mW family typical) |
| SNR at fIN = 175 MHz | — | 48.8 dBFS |
| Family Pin-Compatibility | — | Pin-compatible with KAD2708L (8-bit) and KAD2710C (10-bit) at 105-350 MSPS |
| Process Technology | — | Standard CMOS with FemtoCharge™ |