KAD2708L-35Q68 vs KAD2708L-27Q68 比較
詳細並排比較 KAD2708L-35Q68 由 Renesas Electronics 與 KAD2708L-27Q68 由 Renesas Electronics. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Renesas Electronics
KAD2708L-35Q68 - 8-bit, 350MSPS Single-Channel ADC | Renesas
KAD2708L-35Q68 ✓ 啟用中
規格比較
| 參數 | KAD2708L-35Q68 | KAD2708L-27Q68 |
|---|---|---|
| 品牌 | Renesas Electronics | Renesas Electronics |
| 類別 | ADC/DAC | ADC/DAC |
| 生命週期狀態 | 啟用中 | 啟用中 |
| 解析度 | 8 bits | 8 bit |
| Sample Rate (max) | 350 MSPS | — |
| Number of Channels | 1 (single-channel) | 1 |
| Architecture | Pipelined, FemtoCharge CMOS | Pipelined, FemtoCharge™ switched-capacitor |
| Input Voltage Range (Differential) | 1.5 VP-P | — |
| Analog Input Bandwidth | 600 MHz | — |
| SNR (fIN = 175 MHz) | 48.8 dBFS | 48.8 dBFS |
| Power Consumption (typ) | < 330 mW | < 330 mW at 275 MSPS |
| Digital Output Interface | LVCMOS, parallel | — |
| Output Coding | Two's complement | — |
| AVDD2 Supply | 1.8 V | — |
| AVDD3 Supply | 3.3 V | — |
| Internal Reference | Yes (on-chip) | — |
| Track-and-Hold | Internal | Internal |
| Clock Divider | Selectable divide-by-2 | — |
| Over-Range Indicator | Yes | Yes |
| 工作溫度範圍 | -40 °C to +85 °C | -40C to +85C |
| 封裝 | 68-Ld QFN (10 mm × 10 mm) with exposed paddle | 68-lead QFN with exposed paddle |
| 安裝類型 | Surface Mount | — |
| RoHS 狀態 | Compliant (Pb-free matte tin plate) | — |
| MSL 等級 | Per datasheet TB363 | — |
| Sample Rate (Speed Grade) | — | 275 MSPS |
| Analog Input Type | — | Differential |
| Full-Scale Differential Input Voltage | — | 1.5 VPP |
| Full Power Input Bandwidth (FPBW) | — | 600 MHz |
| Digital Output Type | — | LVCMOS |
| Clock Input | — | LVDS/LVCMOS compatible, divide-by-2 selectable |
| Reference | — | Internal on-chip |
| RoHS Compliance | — | Compliant |
| Process Technology | — | Standard CMOS |