LTC2150CUJ-14 vs LTC2150CUJ-12 比較
詳細並排比較 LTC2150CUJ-14 由 Analog Devices 與 LTC2150CUJ-12 由 Analog Devices. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Analog Devices
LTC2150CUJ-14 - 14-Bit 170Msps 1.8V ADC DDR LVDS | Analog Devices
LTC2150CUJ-14 ✓ 啟用中Analog Devices
LTC2150CUJ-12 - 12-Bit 170Msps Single-Channel ADC | Analog Devices
LTC2150CUJ-12 ✓ 啟用中規格比較
| 參數 | LTC2150CUJ-14 | LTC2150CUJ-12 |
|---|---|---|
| 品牌 | Analog Devices | Analog Devices |
| 類別 | ADC/DAC | ADC/DAC |
| 生命週期狀態 | 啟用中 | 啟用中 |
| 解析度 | 14 bit | 12 bits |
| Number of Channels | 1 | 1 |
| Sample Rate | 170 Msps | 170 Msps (mega-samples per second) |
| Architecture | Pipelined | Pipelined single-channel |
| Analog Supply Voltage | 1.7 V to 1.9 V (1.8 V nominal) | 1.8 V (single supply) |
| Digital Supply Voltage | 1.7 V to 1.9 V (1.8 V nominal) | — |
| INL (typical) | ±0.85 LSB | — |
| DNL (typical) | ±0.25 LSB | — |
| Transition Noise | 1.82 LSBRMS | — |
| Missing Codes | None over temperature | — |
| Full-Power Sample/Hold Bandwidth | 1.25 GHz | — |
| Digital Output Interface | DDR LVDS | — |
| Encode Clock Inputs | Differential ENC+/ENC- (sine, PECL, LVDS, TTL, CMOS) | — |
| Clock Duty-Cycle Stabilizer | Optional (selectable) | — |
| Configuration Interface | Serial SPI port | Serial SPI port |
| Latency | 5 clock cycles | — |
| Power-Saving Modes | Sleep and Nap modes | — |
| 封裝 | 40-QFN (6 mm × 6 mm) with exposed pad | 40-QFN (6 mm x 6 mm) - UJ suffix |
| 安裝類型 | Surface Mount | — |
| RoHS 狀態 | Compliant (Pb-free #PBF suffix) | Compliant (PBF suffix) |
| 腳位數 | — | 40 |
| Digital I/O Supply Voltage | — | 1.8 V to 3.3 V |
| Full-Power Input Bandwidth | — | 1.25 GHz |
| Analog Input Type | — | Differential (required) |
| Clock Duty Cycle Stabilizer | — | Yes (optional) |
| Low-Power Modes | — | Sleep and Nap modes |
| Output Format | — | LVDS / CMOS selectable (per datasheet) |
| Pin Compatibility | — | Pin-compatible 14-bit versions available |
| 工作溫度範圍 | — | [DATA_NEEDED: industrial/commercial grade] |