LTC2256CUJ-12 vs LTC2256CUJ-14 比較

詳細並排比較 LTC2256CUJ-12 由 Analog Devices 與 LTC2256CUJ-14 由 Analog Devices. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

Analog Devices
LTC2256CUJ-14 LTC2256CUJ-14 - 14-Bit 25Msps Ultralow Power 1.8V ADC | ADI

LTC2256CUJ-14 - 14-Bit 25Msps Ultralow Power 1.8V ADC | ADI

LTC2256CUJ-14 ✓ 啟用中

規格比較

參數 LTC2256CUJ-12 LTC2256CUJ-14
品牌 Analog Devices Analog Devices
類別 ADC/DAC ADC/DAC
生命週期狀態 啟用中 啟用中
解析度 12 bit 14 bit
Sample Rate 25 Msps 25 Msps
Architecture Pipelined Pipelined
Number of Channels 1 —
Input Type Differential —
Data Interface Parallel CMOS / DDR CMOS / DDR LVDS —
Analog Supply Voltage (AVDD) 1.8 V (typ) —
Power Consumption 62 mW at 25 Msps —
SNR 71.1 dB 73 dB
SFDR 88 dB —
INL (typical) ±0.3 LSB —
DNL (typical) ±0.1 LSB —
Transition Noise 0.3 LSB RMS 1.13 LSB RMS
Aperture Jitter 0.17 ps RMS —
Output Supply Range (OVDD) 0.5 V to 1.8 V —
Reference Internal or external —
封裝 40-QFN (6 x 6 mm) with exposed pad 40-QFN (6 mm x 6 mm)
Operating Temperature (Commercial, CUJ) 0 C to +70 C —
RoHS 狀態 Compliant (#PBF suffix) Compliant (PBF suffix)
Lead-Free Yes (#PBF suffix) —
Number of Inputs — 1
供應電壓 — 1.8 V (single)
Power Dissipation — 35 mW at 25 Msps
INL — ±1 LSB (typical)
DNL — ±0.3 LSB (typical)
Input Bandwidth (Full Power) — 800 MHz
Input Range — 1 Vp-p to 2 Vp-p (selectable, differential)
Digital Output Modes — Full-rate CMOS, DDR CMOS, DDR LVDS (selectable)
Output Supply Range (CMOS) — 1.2 V to 1.8 V
Pin/Package Code — UJ (QFN-40, 6x6 mm)
Configuration Interface — Serial SPI port
Power-Saving Modes — Nap mode, full shutdown
Optional Features — Clock duty-cycle stabilizer, data output randomizer
工作溫度 — 0C to +70C (commercial C-grade)
安裝類型 — Surface Mount

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