LTC2257CUJ-14 vs LTC2257CUJ-12 比較
詳細並排比較 LTC2257CUJ-14 由 Analog Devices 與 LTC2257CUJ-12 由 Analog Devices. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Analog Devices
LTC2257CUJ-14 - 14-Bit 40Msps Ultralow Power ADC | Analog Devices
LTC2257CUJ-14 ✓ 啟用中Analog Devices
LTC2257CUJ-12 - 12-Bit 40Msps Ultralow Power 1.8V ADC | Analog Devices
LTC2257CUJ-12 ✓ 啟用中規格比較
| 參數 | LTC2257CUJ-14 | LTC2257CUJ-12 |
|---|---|---|
| 品牌 | Analog Devices | Analog Devices |
| 類別 | ADC/DAC | ADC/DAC |
| 生命週期狀態 | 啟用中 | 啟用中 |
| 解析度 | 14 bit | 12 bits |
| Sample Rate | 40 Msps | 40 Msps |
| Architecture | Pipelined | Pipelined, 1 channel |
| Number of Inputs | 1 | — |
| Supply Voltage (Analog) | 1.8 V (typ) | 1.8 V (single) |
| Power Dissipation | 49 mW at 40 Msps | 79 mW at 40 Msps |
| Input Range (selectable) | 1 Vp-p to 2 Vp-p | — |
| Full-Power Input Bandwidth | 800 MHz | — |
| INL (typical) | ±1 LSB | — |
| DNL (typical) | ±0.3 LSB | — |
| Transition Noise | 1.13 LSB RMS | 0.3 LSB RMS |
| Missing Codes Over Temperature | None | — |
| Digital Outputs | Full-rate CMOS / DDR CMOS / DDR LVDS (selectable) | — |
| Output Supply Range (OVDD) | 1.2 V to 1.8 V | — |
| Configuration Interface | Serial SPI port | SPI serial port |
| Power-Saving Modes | Shutdown and Nap | — |
| Optional Features | Data output randomizer, clock duty cycle stabilizer | — |
| 封裝 | 40-pin QFN (6 mm × 6 mm) | 40-QFN (6 mm x 6 mm) |
| 安裝類型 | Surface Mount | — |
| Compliance | RoHS compliant (Pb-free #PBF suffix) | — |
| Supply Voltage (Digital Output) | — | 1.2 V to 1.8 V (separate rail) |
| Input Range | — | 1 V P-P to 2 V P-P (selectable) |
| Input Bandwidth | — | 800 MHz full-power |
| INL (Typical) | — | +/-0.3 LSB |
| DNL (Typical) | — | +/-0.1 LSB |
| Missing Codes | — | None over temperature |
| Output Formats | — | CMOS, DDR CMOS, DDR LVDS (selectable) |
| 工作溫度 | — | -40C to +85C |
| Special Features | — | Clock duty-cycle stabilizer, output randomizer, shutdown and nap modes |