M1AFS250-2PQG208I vs M1AFS250-PQ208 比較

詳細並排比較 M1AFS250-2PQG208I 由 Microsemi 與 M1AFS250-PQ208 由 Microsemi. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

Microsemi
M1AFS250-2PQG208I M1AFS250-2PQG208I - Fusion 250K Mixed-Signal FPGA | Microsemi

M1AFS250-2PQG208I - Fusion 250K Mixed-Signal FPGA | Microsemi

M1AFS250-2PQG208I ✓ 啟用中

規格比較

參數 M1AFS250-2PQG208I M1AFS250-PQ208
品牌 Microsemi Microsemi
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 啟用中 啟用中
Family Fusion (M1) Mixed-Signal FPGA —
System Gates 250000 gates —
User Flash RAM 36864 bits —
Configurable I/O 93 —
Core Supply Voltage 1.5 V (1.425 V to 1.575 V) 1.5 V
Speed Grade -2 —
Process Technology 130 nm 130 nm flash CMOS
Maximum Frequency (distributor listing) 1470.59 MHz —
Configuration Technology Flash-based (non-volatile, single-chip) —
封裝 208-pin PQFP / BFQFP 208-Pin PQFP / BFQFP
安裝類型 Surface Mount Surface Mount
工作接面溫度 -40C to +100C (Industrial) —
Terminal Form Flat (per distributor listing) —
Analog Peripherals Integrated configurable analog block —
On-chip Clock Management Integrated clock generation and management circuitry —
Embedded Memory Flash memory blocks (large capacity) —
Logic Gates — 250000 gates
Fabric Cells / VersaTiles — 6144 cells
Number of I/O — 93
User Flash Memory — 36864 bits
Configuration Memory — Flash-based, on-chip (nonvolatile)
Security — 128-bit flash lock, AES decryption
Terminal Pitch — 0.5 mm
Analog Blocks — Configurable analog (ADC inputs, monitoring) per Fusion family
Clock Management — On-chip PLL / clock conditioning circuitry
Power-Up Behavior — Functional immediately at power-up (no external boot device)
工作溫度 — [DATA_NEEDED: operating temperature range]
RoHS 狀態 — [DATA_NEEDED: RoHS status]
Max Frequency Reference — 1098.9 MHz (family listing per Kynix)

資料表與資源

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