MAX181AEPL vs MAX181CCPL 比較
詳細並排比較 MAX181AEPL 由 Maxim Integrated 與 MAX181CCPL 由 Maxim Integrated. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | MAX181AEPL | MAX181CCPL |
|---|---|---|
| 品牌 | Maxim Integrated | Maxim Integrated |
| 類別 | ADC/DAC | ADC/DAC |
| 生命週期狀態 | Obsolete | NRND |
| Product Type | Data Acquisition System (DAS) / SAR ADC | — |
| 解析度 | 12 bit | 12 bits |
| Number of Analog Input Channels | 8 | 8 |
| Channel Configuration | Single-ended or differential (software-selectable) | — |
| Conversion Architecture | Successive Approximation with Track-and-Hold | — |
| Throughput (max) | 100 ksps | — |
| 輸入電壓範圍 | 0 to +5 V (unipolar) / ±5 V (bipolar) at +5 V supply | — |
| Analog Supply Voltage | +5 V (analog) and +12 V to +15 V or ±12 V to ±15 V | — |
| Digital Supply Voltage | +5 V | — |
| Internal Reference | Yes, low-drift buried zener reference | — |
| Microprocessor Interface | 8-/12-bit µP-compatible parallel bus | — |
| 工作溫度範圍 | 0 C to +70 C (E suffix, industrial) | 0°C to +70°C (Commercial 'C' grade) |
| 封裝 | 40-pin PDIP (PL) | PDIP-40 (Plastic DIP, 0.600 inch / 15.24 mm) |
| 安裝類型 | Through-Hole (DIP) | Through-Hole |
| RoHS 狀態 | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS status not in verified web data] |
| 腳位數 | 40 | — |
| 取樣率 | — | 100 ksps |
| ADC Architecture | — | Successive Approximation (SAR) |
| Input Type | — | Single-Ended, Multiplexed |
| Data Interface | — | Parallel (Word Access) |
| 供應電壓 | — | +5 V single supply |
| On-Chip Reference | — | Yes (5 V, internal) |
| Sample-and-Hold | — | Internal (Track/Hold) |
| Temperature Grade | — | Commercial |
| Power Dissipation (typ) | — | 75 mW at 100 ksps |