MPC5554MVR80 vs MPC5554MVR132 比較
詳細並排比較 MPC5554MVR80 由 NXP Semiconductors 與 MPC5554MVR132 由 NXP Semiconductors. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | MPC5554MVR80 | MPC5554MVR132 |
|---|---|---|
| 品牌 | NXP Semiconductors | NXP Semiconductors |
| 類別 | Microcontrollers | Microcontrollers |
| 生命週期狀態 | NRND | NRND |
| Core | e200z6 (Power Architecture) | — |
| CPU Architecture | 32-bit RISC, 7-stage pipeline | — |
| Maximum CPU Frequency | 80 MHz | — |
| Program Flash Memory | 2 MB (2M x 8) | — |
| 封裝 | 416-ball PBGA, 27 mm x 27 mm, 1 mm pitch | 416-ball TE-PBGA (27 x 27 mm, 1 mm pitch) |
| 安裝類型 | Surface Mount | Surface Mount |
| 工作溫度 | -40C to +125C (Automotive Grade) | — |
| 供應電壓 | 1.8 V / 2.5 V / 3.3 V / 5 V (per datasheet) | — |
| Series | MPC55xx Qorivva | — |
| RAM Size | [DATA_NEEDED: RAM size] | — |
| Data Converters | [DATA_NEEDED: ADC/DAC channels] | — |
| Number of I/O | [DATA_NEEDED: I/O count] | — |
| Connectivity | CAN, FlexRay, eMIOS, eTPU | — |
| RoHS 狀態 | Lead-Free (MS-034AAL-1 TEPBGA-416) | Compliant |
| Lifecycle Stage | NRND (Not Recommended for New Designs) | — |
| Core Architecture | — | Power Architecture e200z6 |
| CPU Core | — | 32-bit, single-core |
| Maximum Operating Frequency | — | 132 MHz |
| Flash Memory Size | — | 2 MB (2M x 8) |
| SRAM Size | — | 64 KB |
| Instruction Cache / Data Cache | — | 64 KB unified |
| Supply Voltage (Core) | — | [DATA_NEEDED: core voltage range] |
| Supply Voltage (I/O) | — | 3.3 V (typical) |
| 工作溫度範圍 | — | -40 C to +125 C (junction) |
| CAN Controllers | — | 2 x FlexCAN 2.0B, 64 message buffers each |
| ADC Channels | — | Up to 40 channels, 12-bit SAR |
| eTPU Channels | — | 64 channels (Enhanced Time Processing Unit) |
| DSPI Modules | — | 3 x DSPI (Deserial/Serial Peripheral Interface) |
| External Bus Interface | — | 16-bit / 32-bit bus, supports SDRAM, SRAM, Flash up to 16 MB |
| MMU / FPU | — | MMU present; FPU (single-precision) per e200z6 core |
| MSL 等級 | — | 3 (per JEDEC J-STD-020) |