MPC8536EAVTANG vs MPC8536EAVTAVLA557 比較
詳細並排比較 MPC8536EAVTANG 由 NXP Semiconductors 與 MPC8536EAVTAVLA557 由 NXP Semiconductors. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
NXP Semiconductors
MPC8536EAVTAVLA557 - 1.5GHz PowerQUICC III e500 MPU | NXP
MPC8536EAVTAVLA557 ✓ 啟用中規格比較
| 參數 | MPC8536EAVTANG | MPC8536EAVTAVLA557 |
|---|---|---|
| 品牌 | NXP Semiconductors | NXP Semiconductors |
| 類別 | Microcontrollers | Microcontrollers |
| 生命週期狀態 | 啟用中 | 啟用中 |
| Core Architecture | PowerPC e500 | PowerPC e500 (32-bit Power Architecture) |
| Number of Cores | 1 | — |
| 資料匯流排寬度 | 32-bit | 32-bit |
| Maximum Core Frequency | 800 MHz | — |
| Process Technology | 90 nm CMOS | — |
| 封裝 | 783-FCBGA (FC-PBGA) 29x29 mm | — |
| 安裝類型 | Surface Mount | Surface Mount (BGA) |
| L1 Cache | 32 KB I-cache + 32 KB D-cache | — |
| L2 Cache | Integrated | — |
| Memory Controller | DDR2 SDRAM with ECC | DDR2/DDR3 with ECC (per MPC8536E family documentation) |
| Ethernet | 2x 10/100/1000 Mbps eTSEC | — |
| PCI Express | x4 | PCIe interface supported (per MPC8536E family documentation) |
| Local Bus | 32-bit (16-bit muxed mode also supported) | — |
| Security Engine | IPSec, Kasumi, SNOW 3G acceleration | Integrated (per MPC8536E family documentation) |
| 工作溫度 | 0C to +105C (Tj) | -40C to +105C (extended industrial grade, per supplier data) |
| 供應電壓 | 1.5 V / 1.8 V / 2.5 V / 3.3 V (per datasheet) | — |
| Series | PowerQUICC III (MPC85xx) | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS status] | Compliant |
| Manufacturer | — | NXP Semiconductors (formerly Freescale) |
| Processor Series | — | PowerQUICC III (MPC85xx) |
| Core Count | — | 1 |
| Core Frequency (max) | — | 1.5 GHz |
| Physical Address Width | — | 36-bit |
| FP/SIMD Support | — | Double-precision embedded FPU (64-bit) and single-precision vector/scalar SIMD |
| Core Voltage | — | 1.1 V |
| 封裝 / 外殼 | — | 783-FCBGA (29x29 mm) |
| Ethernet MACs | — | Multiple Gigabit Ethernet MACs (per MPC8536E family documentation) |
| Local Bus Controller | — | Yes (per MPC8536E family documentation) |
| MSL 等級 | — | Per JEDEC J-STD-020 (FCBGA) |