P5010NSN1QMB vs P5010NSE1QMB557 比較

詳細並排比較 P5010NSN1QMB 由 NXP Semiconductors 與 P5010NSE1QMB557 由 NXP Semiconductors. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

NXP Semiconductors
P5010NSE1QMB557 P5010NSE1QMB557 - QorIQ P5 PowerPC 64-Bit MPU, 2GHz | NXP

P5010NSE1QMB557 - QorIQ P5 PowerPC 64-Bit MPU, 2GHz | NXP

P5010NSE1QMB557 ✓ 啟用中

規格比較

參數 P5010NSN1QMB P5010NSE1QMB557
品牌 NXP Semiconductors NXP Semiconductors
類別 Microcontrollers DSP
生命週期狀態 啟用中 啟用中
Architecture Power Architecture e5500 (64-bit) —
Core Count 1 core 1
Maximum Core Frequency 2.0 GHz 2.0 GHz
Cache (L1 Instruction per core) 32 KB —
Cache (L1 Data per core) 32 KB —
Cache (L2 shared frontside) 1 MB —
Memory Controller DDR3 with ECC support 64-bit DDR3/DDR3L with ECC
PCIe PCI Express Gen 2 controllers integrated —
Ethernet Dual Gigabit Ethernet —
High-Speed Interconnect Serial RapidIO (SRIO) —
Hardware Acceleration DPAA (Data Path Acceleration Architecture) engine —
Security Engine SEC crypto engine integrated Symmetric and asymmetric cryptography
封裝 1295-FCBGA (37.5 x 37.5 mm) 1295-FCPBGA (37.5 x 37.5 mm)
工作溫度 0C to +105C —
Encryption Hardware-accelerated —
Core Architecture — PowerPC e5500 (64-bit)
L2 Cache — 1 MB
L3 Cache — 512 KB
Process Technology — [DATA_NEEDED: process node nm]
工作溫度範圍 — -40C to +105C
Ethernet Interfaces — 10 Gigabit Ethernet + Gigabit Ethernet MACs
PCIe Controllers — 2 x PCIe Gen 2
DMA Engines — Multiple
安裝類型 — Surface Mount (BGA)
RoHS 狀態 — Compliant

資料表與資源

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