RTAX2000S-1LG1152V vs RTAX2000S-CG1152V 比較
詳細並排比較 RTAX2000S-1LG1152V 由 Microchip Technology 與 RTAX2000S-CG1152V 由 Microchip Technology. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Microchip Technology
RTAX2000S-1LG1152V - 2M-Gate Rad-Tolerant FPGA | Microchip
RTAX2000S-1LG1152V ✓ 啟用中Microchip Technology
RTAX2000S-CG1152V - 2M-Gate Rad-Tolerant FPGA | Microchip
RTAX2000S-CG1152V ✓ 啟用中規格比較
| 參數 | RTAX2000S-1LG1152V | RTAX2000S-CG1152V |
|---|---|---|
| 品牌 | Microchip Technology | Microchip Technology |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | 啟用中 |
| Equivalent System Gates | 2,000,000 gates | 2,000,000 |
| Logic Cells | 32,256 | 32,256 |
| CLBs (Logic Elements) | 21,504 | — |
| Technology | CMOS antifuse (OTP) | — |
| Family | RTAX-S/SL Radiation-Tolerant FPGAs | — |
| Speed Grade | -1 | — |
| 封裝 | 1152-ball ceramic column grid array (LG1152 / CGA-1152) | CG1152 - 1152-terminal ceramic metal-sealed cofired CBGA |
| 安裝類型 | Surface Mount | Surface Mount (BGA) |
| Configuration | Live at power-up (antifuse, no external boot device) | — |
| Embedded Memory | Embedded SRAM with built-in FIFO control logic | Embedded SRAM with built-in FIFO control logic |
| Clock Features | Segmentable clocks, chip-wide synchronization | — |
| Radiation Tolerance | Radiation-tolerant for space flight systems | Radiation-tolerant (RadTolerant, RTAX-S family) |
| Programmability | One-time programmable (OTP) | — |
| Power | [DATA_NEEDED: static and dynamic power figures] | — |
| Core Voltage | [DATA_NEEDED: core supply voltage] | — |
| 工作溫度 | [DATA_NEEDED: operating temperature range] | -55C to +125C |
| Qualification | Space/defense qualified flow (see Microchip DLA Cross Reference Guide) | — |
| RoHS 狀態 | unknown (ceramic hermetic package; verify on product page) | [DATA_NEEDED: RoHS Status] |
| CLBs (Logic Modules) | — | 21,504 |
| User I/O | — | 684 inputs / 684 outputs |
| Core Supply Voltage | — | 1.5 V nominal |
| Process Technology | — | CMOS |
| Programming Technology | — | Anti-fuse (OTP), live at power-up |
| Clocking | — | Segmentable clocks, chip-wide highway routing |
| Arithmetic Support | — | Dedicated carry logic |
| Maximum Density in Family | — | Up to 4,000,000 equivalent system gates (RTAX-S/SL family) |
| MSL 等級 | — | [DATA_NEEDED: MSL Level] |