RTAX2000SL-1CG624PROTO vs RTAX2000S-CG624PROTO 比較
詳細並排比較 RTAX2000SL-1CG624PROTO 由 Microchip Technology 與 RTAX2000S-CG624PROTO 由 Microchip Technology. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Microchip Technology
RTAX2000SL-1CG624PROTO - 2M Space FPGA | Microchip
RTAX2000SL-1CG624PROTO ✓ 啟用中Microchip Technology
RTAX2000S-CG624PROTO - 2M-Gate Rad-Tolerant FPGA CCGA-624 | Microchip
RTAX2000S-CG624PROTO ✓ 啟用中規格比較
| 參數 | RTAX2000SL-1CG624PROTO | RTAX2000S-CG624PROTO |
|---|---|---|
| 品牌 | Microchip Technology | Microchip Technology |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | 啟用中 |
| Product Type | Radiation-tolerant FPGA | — |
| Series | RTAX2000SL | — |
| Equivalent System Gates | 2,000,000 | — |
| Logic Cells | 32,256 | — |
| CLBs | 21,504 | — |
| Technology | Advanced CMOS | — |
| Radiation Tolerance | Radiation-tolerant for space-flight systems | — |
| 封裝 | 624-terminal ceramic CBGA624 | CCGA-624 (ceramic column grid array, 624 balls) |
| Package Type | Ceramic column-grid array | — |
| Speed Grade | -1 | — |
| Live-at-Power-Up | Yes | — |
| Single-Chip Form Factor | Yes | — |
| Core Supply Voltage | [DATA_NEEDED: core supply voltage] | — |
| User I/O Count | [DATA_NEEDED: user I/O count] | — |
| Embedded SRAM | [DATA_NEEDED: embedded SRAM bits with FIFO logic] | — |
| Segmentable Clock Resources | Available in family | — |
| 工作溫度範圍 | [DATA_NEEDED: operating temperature range] | — |
| RoHS | Unknown | — |
| Family | — | RTAX-S Radiation-Tolerant FPGA |
| System Gates | — | 2,000,000 |
| Logic Cells (R-cells) | — | 21,504 |
| D-Flip-Flops (Registers) | — | 32,256 |
| Logic Architecture | — | CMOS antifuse (OTP), SEU-hardened |
| 安裝類型 | — | Surface Mount |
| 工作溫度 | — | -55C to +125C |
| Logic Family | — | CMOS |
| Configuration | — | Live at power-up (non-volatile antifuse) |
| SEU Immunity | — | SEU rate < 10^-10 errors/bit-day (per family datasheet) |
| Prototyping Variant | — | Yes (PROTO suffix) |
| Embedded Memory | — | Embedded SRAM blocks (FIFO / dual-port capable) |
| I/O Standards | — | Single-ended and differential (P/N pin pairs) |
| Design Software | — | Microsemi/Microchip Libero SoC |
| 供應電壓 | — | [DATA_NEEDED: core and I/O supply voltage] |
| Total Ionizing Dose (TID) | — | [DATA_NEEDED: TID rating in krad(Si)] |
| RoHS 狀態 | — | [DATA_NEEDED: RoHS compliance] |
| Maximum I/O Count (624-ball pkg) | — | [DATA_NEEDED: user I/O count] |
| Moisture Sensitivity Level | — | [DATA_NEEDED: MSL level] |