RTAX2000SL-1CQ352V vs RTAX1000SL-CQ352V 比較
詳細並排比較 RTAX2000SL-1CQ352V 由 Microchip Technology 與 RTAX1000SL-CQ352V 由 Microchip Technology. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Microchip Technology
RTAX2000SL-1CQ352V - 2M-Gate Rad-Tolerant FPGA | Microchip
RTAX2000SL-1CQ352V ✓ 啟用中Microchip Technology
RTAX1000SL-CQ352V - 1M-Gate Rad-Tolerant FPGA | Microchip
RTAX1000SL-CQ352V ✓ 啟用中規格比較
| 參數 | RTAX2000SL-1CQ352V | RTAX1000SL-CQ352V |
|---|---|---|
| 品牌 | Microchip Technology | Microchip Technology |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | 啟用中 |
| Family | RTAX-S/SL Radiation-Tolerant FPGA | RTAX-SL (RTAX-S/SL Radiation-Tolerant FPGAs) |
| Equivalent System Gates | 2,000,000 | 1,000,000 |
| CLB Count | 21,504 | — |
| Logic Cells | 32,256 | 18,144 |
| Core Supply Voltage | 1.5 V (1.425 V to 1.575 V) | — |
| Process Technology | CMOS, antifuse OTP interconnect | 0.15 um CMOS |
| Radiation Tolerance | Radiation-tolerant (space flight grade) | Radiation-tolerant, space-flight qualified family |
| Configuration | Live at power-up, single chip (antifuse) | — |
| Embedded Memory | Embedded SRAM with built-in FIFO control | Embedded SRAM with built-in FIFO control logic |
| Clocking | Segmentable clock resources, chip-wide highway routing | — |
| 封裝 | 352-pin ceramic CQFP (CQ352) | 352-pin Ceramic CQFP (CQ352V) |
| 安裝類型 | Surface Mount | Surface Mount |
| Application Domain | Space flight systems | — |
| 工作溫度 | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: operating temperature range] |
| I/O Supply Voltage | [DATA_NEEDED: I/O bank voltage] | — |
| Total Ionizing Dose (TID) | [DATA_NEEDED: TID rating] | [DATA_NEEDED: TID rating in krad (Si)] |
| MSL 等級 | Not applicable (ceramic package) | [DATA_NEEDED: moisture sensitivity level] |
| RoHS 狀態 | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance status] |
| CLBs (Logic Modules) | — | 12,096 |
| Maximum Toggle Frequency | — | 581 MHz |
| Core Voltage | — | 1.5 V |
| Programming Technology | — | Antifuse (one-time programmable) |
| Power-Up Behavior | — | Live at power-up (non-volatile) |
| Configuration Upset Immunity | — | No SEU in configuration memory (antifuse) |
| I/O Voltage | — | [DATA_NEEDED: I/O bank voltage range] |
| Estimated Equivalent Gates per CLB | — | [DATA_NEEDED: gates-per-CLB ratio] |