RTAX4000D-CQ352B vs RTAX4000SL-1CQ352B 比較
詳細並排比較 RTAX4000D-CQ352B 由 Microchip Technology 與 RTAX4000SL-1CQ352B 由 Microchip Technology. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Microchip Technology
RTAX4000D-CQ352B - 4M-Gate Rad-Tolerant FPGA CQFP-352 | Microchip
RTAX4000D-CQ352B ✓ 啟用中Microchip Technology
RTAX4000SL-1CQ352B - 4M-Gate Rad-Tolerant FPGA CQFP-352 | Microchip
RTAX4000SL-1CQ352B ✓ 啟用中規格比較
| 參數 | RTAX4000D-CQ352B | RTAX4000SL-1CQ352B |
|---|---|---|
| 品牌 | Microchip Technology | Microchip Technology |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | 啟用中 |
| Logic Cells | 55,440 | 60,480 |
| Configurable Logic Blocks (CLBs) | 36,960 | — |
| Equivalent Gates | 4,000,000 | — |
| System Gates (cells, per Jotrin listing) | 33,600 | — |
| Family | RTAX-DSP (RTAX-S/SL/DSP) | RTAX-SL Radiation-Tolerant FPGA |
| Process Technology | 0.15 um | 0.15 um |
| Core Supply Voltage | 1.5 V (1.425 V to 1.575 V) | 1.5 V |
| Combinatorial CLB Delay | [DATA_NEEDED: combinatorial CLB delay for standard speed grade; 0.99 ns max is specified for the -1 speed grade variant] | — |
| Technology Type | Antifuse, one-time programmable, radiation-tolerant | — |
| 封裝 | 352-pin Ceramic CQFP (CQFP-352) | 352-Pin CQFP (ceramic quad flat pack) |
| 安裝類型 | Surface Mount | Surface Mount |
| Configuration | Live at power-up, single chip, no external configuration memory | — |
| Radiation Tolerance | Radiation-tolerant (space-flight qualified family) | Radiation-tolerant, for space flight systems |
| Application Domain | Space flight systems | — |
| Programmability | OTP (one-time programmable antifuse) | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| 工作溫度 | [DATA_NEEDED: operating temperature range] | — |
| Equivalent System Gates | — | 4,000,000 gates |
| CLBs (Clocked Logic Blocks) | — | 40,320 |
| Speed Grade | — | -1 |
| Programming Technology | — | Anti-fuse, one-time programmable |
| Power-Up Behavior | — | Live at power-up (no external configuration device) |
| Embedded Memory | — | Embedded SRAM with built-in FIFO control logic |
| Clock Features | — | Segmentable clocks, chip-wide resources |
| Base Architecture | — | Axcelerator (commercial) derived |
| 工作溫度範圍 | — | [DATA_NEEDED: operating temperature range] |
| I/O Voltage | — | [DATA_NEEDED: I/O bank voltage range] |