SI5345A-D-GM vs SI5345A-D10713-GM 比較

詳細並排比較 SI5345A-D-GM 由 Skyworks Solutions 與 SI5345A-D10713-GM 由 Skyworks Solutions. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

Skyworks Solutions
SI5345A-D-GM SI5345A-D-GM - 10-Output Jitter Attenuator, <1028 MHz | Skyworks

SI5345A-D-GM - 10-Output Jitter Attenuator, <1028 MHz | Skyworks

SI5345A-D-GM ✓ 啟用中
Skyworks Solutions
SI5345A-D10713-GM SI5345A-D10713-GM - 10-Output Jitter Attenuator | Skyworks

SI5345A-D10713-GM - 10-Output Jitter Attenuator | Skyworks

SI5345A-D10713-GM ✓ 啟用中

規格比較

參數 SI5345A-D-GM SI5345A-D10713-GM
品牌 Skyworks Solutions Skyworks Solutions
類別 Clock & Timing Clock & Timing
生命週期狀態 啟用中 啟用中
Product Type 10-Channel Any-Frequency Any-Output Jitter Attenuator / Clock Multiplier Clock Multiplier / Jitter Attenuator
Series Si5345 (Si5345A/B/C/D variants) —
輸出數量 10 10
Differential Input Frequency Range 8 kHz to 750 MHz —
LVCMOS Input Frequency Range 8 kHz to 250 MHz —
Differential Output Frequency Range 100 Hz to 1028 MHz —
Output RMS Jitter 90 fs typical (12 kHz to 20 MHz) —
External Crystal Reference 25 to 54 MHz (XA/XB pins) —
Jitter Attenuation Bandwidth Digitally programmable Digitally programmable, 0.1 Hz to 4 kHz
Architecture DSPLL with digital holdover —
Configuration Interface I2C / SPI (ClockBuilder Pro software) —
封裝 64-VFQFN Exposed Pad (QFN-64 EP, 9x9 mm) 64-VFQFN Exposed Pad (9 mm x 9 mm)
安裝類型 Surface Mount —
工作溫度範圍 -40C to +85C (industrial) -40C to +85C (industrial grade)
供應電壓 1.8 V / 2.5 V / 3.3 V core and I/O (per register config) 3.3 V core, configurable output supply domains
RoHS 狀態 Compliant Compliant
Lead-Free / Halogen-Free Lead-free per Skyworks product page —
Maximum Output Frequency — 1028 MHz
Input Reference Frequency Range — 1 Hz to 750 MHz (per datasheet family)
Output Frequency Range — 1 Hz to 1028 MHz
Number of Independent DSPLL Lanes — 4
Typical RMS Jitter (12 kHz to 20 MHz) — < 100 fs (Si5345 family typical)
Control Interface — I2C / SPI
On-Chip EEPROM — Yes (factory programmed with -Dxxxxx frequency plan)
Output Types — Differential (LVPECL, LVDS, HCSL, CML) and single-ended CMOS
Reference Inputs — Up to 2 references with hitless switching and holdover
Configuration Tool — ClockBuilder Pro
MSL 等級 — MSL3 / 3 (per JEDEC J-STD-020)

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