STM32H753XIH6 vs STM32H7A3VIT6 比較
詳細並排比較 STM32H753XIH6 由 STMicroelectronics 與 STM32H7A3VIT6 由 STMicroelectronics. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
STMicroelectronics
STM32H7A3VIT6 - 280MHz Cortex-M7 MCU, 2MB Flash, LQFP-100 | STMicroelectronics
STM32H7A3VIT6 ✓ 啟用中規格比較
| 參數 | STM32H753XIH6 | STM32H7A3VIT6 |
|---|---|---|
| 品牌 | STMicroelectronics | STMicroelectronics |
| 類別 | Microcontrollers | Microcontrollers |
| 生命週期狀態 | 啟用中 | 啟用中 |
| Core | ARM Cortex-M7 with double-precision FPU + DSP | ARM Cortex-M7 (32-bit) |
| Maximum CPU Frequency | 480 MHz | — |
| DMIPS | 1027 DMIPS (2.14 DMIPS/MHz, Dhrystone 2.1) | — |
| L1 Cache | 16 KB instruction cache + 16 KB data cache | — |
| Program Memory (Flash) | 2 MB | — |
| RAM | 1 MB (SRAM, multiple banks) | — |
| 封裝 | TFBGA-176 (XIH), 10x10 mm, 0.65 mm pitch | 100-pin LQFP (14x14 mm) |
| Supply Voltage (VDD) | 1.62 V to 3.6 V | 1.62 V to 3.6 V |
| 工作溫度 | -40C to +85C (industrial grade 6) | -40 C to +85 C (industrial grade) |
| ADC | 2x 16-bit ADC (up to 3.6 MSPS) | 3 x 16-bit, up to 3.6 MSPS |
| DAC | 2x 12-bit DAC | 2 x 12-bit |
| Communication | USB OTG FS + HS, CAN FD, Ethernet MAC, SDMMC, FMC | USB 2.0 FS+HS OTG, CAN FD, USART/UART, SPI, I2C, SAI, SDMMC, FMC |
| Graphics Accelerator | Chrom-ART (DMA2D) + JPEG codec hardware | — |
| Cryptography | AES, SHA-256, RSA, TRNG (on select SKU) | — |
| Internal Regulator | Integrated SMPS step-down + LDO, software-controlled | — |
| RoHS 狀態 | Compliant | Compliant |
| MSL 等級 | 3 | [DATA_NEEDED: MSL level] |
| 安裝類型 | Surface Mount | Surface Mount |
| Maximum CPU Clock | — | 280 MHz |
| Flash Memory | — | 2 MB (2M x 8) |
| SRAM | — | 1.4 MB total (SRAM1/SRAM2/SRAM3/SRAM4 + DTCM + AXI SRAM) |
| I/O Count (approx.) | — | [DATA_NEEDED: I/O count] |
| Timers | — | [DATA_NEEDED: timer count details] |
| Graphics | — | Chrom-ART (DMA2D) accelerator, TFT-LCD controller (LTDC) |
| Math Accelerators | — | FMAC, CORDIC, single-precision hardware MAC |
| Security | — | Cryptographic accelerators, TRNG, secure boot support |
| FPU | — | Double-precision IEEE 754 |
| Cache | — | 16 KB I-cache + 16 KB D-cache |