XC3090L-8PCG84I vs XC3090L-8PC84BKJ 比較
詳細並排比較 XC3090L-8PCG84I 由 Xilinx 與 XC3090L-8PC84BKJ 由 Xilinx. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | XC3090L-8PCG84I | XC3090L-8PC84BKJ |
|---|---|---|
| 品牌 | Xilinx | Xilinx |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | XC3000L Low-Voltage Field Programmable Gate Array | XC3000L Low-Voltage Logic Cell Array |
| Usable Gates | 6,000 | 6,000 |
| Configurable Logic Blocks (CLBs) | 320 | — |
| User I/O Pins | 70 | — |
| 供應電壓 | 3.3 V | — |
| Maximum Toggle Frequency | 80 MHz | — |
| Speed Grade | -8 | -8 (approx. 70 MHz toggle) |
| 封裝 | 84-pin PLCC (PCG84) | 84-pin PLCC (J-Lead), windowed ceramic (BKJ) |
| 安裝類型 | Through-Hole (PLCC socket) | Through-hole (PLCC socket) |
| 工作溫度 | -40 °C to +85 °C (Industrial) | 0C to +70C (commercial, C suffix) |
| Configuration Memory | SRAM (volatile, reload required at power-up) | 64,160 bits |
| Process Technology | CMOS SRAM-based FPGA | 5 ns CMOS SRAM |
| I/O Standards | TTL, CMOS | — |
| RoHS 狀態 | [DATA_NEEDED: rohs compliance for legacy PLCC variant] | unknown - legacy windowed ceramic package |
| Lead-Free | [DATA_NEEDED: lead-free status for PCG84 PLCC package] | — |
| Development Tool | XACT (Xilinx Classic), XC3000 design flow | — |
| Programmable Elements | IOBs, CLBs, Programmable Interconnect | — |
| Boundary Scan | Yes (per XC3000 family) | IEEE 1149.1 (JTAG) compliant |
| Logic Cells | — | 320 |
| Maximum User I/O | — | 144 |
| Supply Voltage (Vcc) | — | 3.0 V to 3.6 V (low-voltage) |
| Configuration Method | — | Serial/parallel SRAM, in-system reconfigurable |
| MSL 等級 | — | [DATA_NEEDED: MSL rating] |
| Configuration Pins | — | M0, M1, M2 mode-select + DIN, DOUT, CCLK, INIT |