XC3090LTM-8PC84C vs XC3090L-8PC84C 比較
詳細並排比較 XC3090LTM-8PC84C 由 Xilinx 與 XC3090L-8PC84C 由 Xilinx. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | XC3090LTM-8PC84C | XC3090L-8PC84C |
|---|---|---|
| 品牌 | Xilinx | Xilinx |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | XC3000L Low Voltage Logic Cell Array | — |
| Logic Cells / Gates | ~6,000 usable gates | — |
| Configurable Logic Blocks (CLBs) | 320 | — |
| Configuration Memory | 64,160 bits (distributed SRAM) | 64,160 bits |
| Configuration Method | External EEPROM/EPROM/ROM/master/microprocessor mode | — |
| Core Supply Voltage | 3.0 V to 3.6 V (3.3 V typical) | — |
| Process Technology | 0.8 um CMOS SRAM-based | — |
| 封裝 | 84-Pin Plastic Leaded Chip Carrier (PLCC, J-Lead) | — |
| 腳位數 | 84 | — |
| 安裝類型 | Surface Mount (PLCC socket-compatible) | Surface Mount / Socket |
| Speed Grade | -8 (per suffix; see device decoder) | -8 |
| 工作溫度 | -40 C to +85 C (industrial, TM suffix typically commercial/industrial) | — |
| Maximum Toggle Frequency | [DATA_NEEDED: specific fmax value] | 80 MHz |
| Logic Block Delays | [DATA_NEEDED: typical TBU/TPIO delay] | — |
| I/O Standard Support | TTL/CMOS 3.3 V (5 V tolerant with restrictions) | — |
| RoHS 狀態 | unknown | — |
| Lead-Free | unknown | — |
| Programming Toolchain | XACT / Foundation (legacy, EOL software) | — |
| Product Type | — | Field Programmable Gate Array (FPGA) |
| Series | — | XC3000A/L |
| Gates (Usable) | — | 6,000 |
| Logic Cells (CLBs) | — | 320 |
| User I/O Pins | — | 70 |
| 供應電壓 | — | 3.3 V (L variant) |
| Operating Temperature Grade | — | Commercial (C) |
| Package Type | — | 84-pin PLCC (J-lead) |
| Boundary Scan | — | JTAG IEEE 1149.1 |
| Configuration Mode | — | Serial / Parallel / Boundary-Scan |
| Lead-Free / RoHS | — | [DATA_NEEDED: RoHS status for legacy PLCC] |