XC6SLX16-2CPG196I vs XC6SLX16-3CPG196C 比較
詳細並排比較 XC6SLX16-2CPG196I 由 AMD 與 XC6SLX16-3CPG196C 由 AMD. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | XC6SLX16-2CPG196I | XC6SLX16-3CPG196C |
|---|---|---|
| 品牌 | AMD | AMD |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | 啟用中 |
| 庫存狀態 | In Stock | — |
| 單價 (USD) | $95.16 | — |
| Product Series | Spartan-6 LX | — |
| Part Number | XC6SLX16-2CPG196I | — |
| Manufacturer | AMD (formerly Xilinx) | — |
| Logic Cells | 14,579 | — |
| Slices | 2,278 (each = 4 LUTs + 8 FFs) | 2,278 |
| Block RAM | 576 Kbit (72 Kbyte) | 576 Kbits (1,451 Kbits total) |
| DSP Slices | 32 (DSP48A1) | — |
| Maximum User I/Os | 106 | — |
| Core Voltage | 1.2 V nominal | 1.2 V |
| Speed Grade | -2 | -3 (highest performance) |
| 工作溫度 | -40 °C to +100 °C (industrial, "I" suffix) | 0 C to 85 C (Commercial) |
| 封裝 | 196-ball CSBGA / TFBGA, 8 mm × 8 mm | 196-ball CSBGA (0.5 mm pitch, 8x8 mm) |
| Package Code | CPG196 | — |
| Process Technology | 45 nm CMOS, 9-metal copper, low-k | 45 nm CMOS |
| Clock Management | 4 DCMs + 2 PLLs | — |
| Memory Controller Blocks | 2 MCBs (DDR/DDR2/LPDDR) | — |
| Configuration Memory Interface | SPI, BPI, JTAG, Master Serial | — |
| RoHS Compliance | RoHS-compliant (lead-free) | — |
| Family | — | Spartan-6 LX |
| Device Logic Cells | — | 14,579 |
| DSP48A1 Slices | — | 32 |
| User I/O Count | — | 106 |
| Maximum Internal Frequency | — | 667 MHz |
| Number of CLBs | — | 1,139 |
| 安裝類型 | — | Surface Mount (BGA) |
| RoHS 狀態 | — | RoHS Compliant (Lead Free) |
| Clock Management Tiles | — | 2 CMTs (PLL + DCM each) |
| Hard PCIe Blocks | — | 1-lane PCIe Gen1 endpoint |
| Hard Memory Controller | — | Yes (DDR/DDR2/DDR3/LPDDR) |