AD678BD - 12-Bit 200 kSPS Sampling ADC | Analog Devices
MPN： AD678BD ✓ 啟用中AD678BD 概覽
A sampling ADC is an ADC that acquires an input voltage onto an internal sample-and-hold amplifier before converting it into a digital value. The AD678 belongs to the monolithic ADC hierarchy, combining multiple analog and digital functions on one semiconductor die. This integration reduces the number of external components required for a complete measurement channel while retaining the interface, reference, and clock functions needed for microprocessor-based data acquisition.
The AD678BD's principal verified features include 12-bit resolution, a 200 kSPS conversion rate, one analog input, one flash-conversion stage, and a 28-pin CDIP package. The integrated sample-and-hold amplifier supports acquisition of time-varying signals, while the internal voltage reference and clock-generation circuitry simplify system implementation. According to the Analog Devices product page, the AD678 also provides the same pinout as the 14-bit, 128 kSPS AD679 ADC.
Architecturally, the AD678 uses a complete monolithic conversion structure rather than requiring a separate sample-and-hold amplifier, reference, and flash ADC. This is important in signal-processing systems where the converter must accept rapidly changing inputs while presenting a digital result to a microprocessor or digital signal processor. The device is specified for both static conversion behavior and dynamic parameters such as signal-to-noise-plus-distortion ratio, total harmonic distortion, and intermodulation distortion.
Typical applications include industrial process measurement, instrumentation, laboratory data acquisition, communications equipment, digital signal processing, and embedded control systems. The AD678 is also suitable for designs requiring a fully integrated sampling ADC with a microprocessor-compatible bus. The AD679 presents a relevant upgrade path because Analog Devices states that it uses the same pinout, although its 14-bit resolution and 128 kSPS maximum rate differ from the AD678.
Designers should verify input range, acquisition timing, output coding, clock behavior, reference accuracy, and digital-interface timing against the current manufacturer datasheet before layout. The 28-pin CDIP package is intended for through-hole assembly and requires careful attention to thermal performance, analog grounding, and decoupling near the converter pins. Avoid treating the AD679 as an interchangeable performance replacement because its resolution and maximum sampling rate differ.
This page consolidates verified manufacturer and distributor information, same-package replacement candidates, comparison parameters, and practical selection guidance. It distinguishes documented drop-in options from merely related converters and identifies all electrical, pricing, compliance, and pinout details that remain unverified in the supplied source data.
直接替換替代品，適用於 AD678BD — 相同封裝，腳位對腳位相容。需重新設計 PCB 的不同封裝零件不列入。
此系列的變體
與下列產品可直接替換的同系列型號： AD678BD （相同外形與佔位） — 差異在於 Package.
AD678AD
✅ 直接替換聯絡詢價
查看資料表 →AD678TD
✅ 直接替換📋 參考替代品（不在目錄中）
AD678TD/883B
✅ 直接替換📋 參考替代品（不在目錄中）
AD678AZ
✅ 直接替換 ⚠️ 規格未經驗證📋 參考替代品（不在目錄中）
AD678BZ
✅ 直接替換 ⚠️ 規格未經驗證📋 參考替代品（不在目錄中）
AD678BD 最大額定值與電氣特性
| Converter Type | Monolithic sampling ADC |
| 解析度 | 12 bit |
| 取樣率 | 200 kSPS |
| Input Channel Count | 1 channel |
| Conversion Architecture | 1 flash |
| Integrated Sample-and-Hold Amplifier | Yes |
| Digital Interface | Microprocessor-compatible bus |
| Internal Voltage Reference | Yes |
| Internal Clock Generation | Yes |
| Number of Output Codes | 4,096 codes |
| 封裝 | 28-pin CDIP (SB) |
| 安裝類型 | Through-hole |
| MIL-STD-883 Compliance | Available in compliant versions; AD678BD qualification details require datasheet verification |
AD678BD 28-pin cdip (sb) 腳位配置指南
AD678BD（28-pin cdip (sb) 封裝）的腳位配置。 此類比元件具有輸入、輸出與電源腳位。偏移歸零、補償與致能腳位配置請參閱製造商資料表。適用於訊號調理與放大器電路。
無詳細腳位定義資料： AD678BD.
請參閱 資料表 以查看完整腳位配置。
典型應用
AD678BD 適用於 6 應用s: Industrial Process Measurement, Laboratory Data Acquisition, Digital Signal Processing Front End, Power and Process Monitoring, Communications and Modulation Equipment, Legacy Embedded Control Systems.
Industrial Process Measurement
The AD678BD fits industrial process-measurement channels that require a complete 12-bit sampling ADC rather than a bare flash-conversion die. Its 200 kSPS maximum sampling rate and integrated sample-and-hold amplifier allow the converter to acquire a changing process signal at regular intervals, while the internal reference and clock circuitry simplify the analog front end. The microprocessor-compatible bus is useful when supervisory control equipment must acquire measurements and pass them to a processor. The 28-pin CDIP package favors through-hole industrial and legacy control assemblies rather than compact mixed-signal boards. Before implementation, verify input range, common-mode requirements, acquisition time, and isolation or protection needs; those values are not established by the supplied excerpts.
推薦
Laboratory Data Acquisition
The AD678BD is appropriate for laboratory and instrumentation systems requiring a self-contained 12-bit, 200 kSPS conversion channel. The integrated sample-and-hold amplifier, voltage reference, and clock-generation circuitry reduce the number of separate analog support blocks, while the microprocessor-compatible interface enables direct connection to control logic or a processor bus. This makes the device useful for multichannel bench systems where repeatable sampling and compact subsystem design are important. The 28-pin CDIP construction supports through-hole prototyping and industrial instrument architecture, although its footprint is larger than a modern surface-mount ADC. Confirm converter input bandwidth, acquisition settling, output coding, and timing against the Analog Devices datasheet before selecting input filters and sampling-clock arrangements.
推薦
Digital Signal Processing Front End
The AD678BD can serve as the sampling front end for digital signal processing systems that need to digitize dynamic waveforms at up to 200 kSPS. Its 12-bit resolution supplies 4,096 numerical levels, and the integrated sample-and-hold amplifier prepares the analog waveform for the flash-conversion stage before the result is transferred through the microprocessor-compatible interface. Dynamic specifications such as signal-to-noise-plus-distortion ratio, total harmonic distortion, and intermodulation distortion are particularly relevant to waveform, vibration, and vibration-analysis channels. Those numerical limits remain unavailable in the supplied excerpts and must be obtained from the manufacturer datasheet. System designers should also band-limit the input to avoid aliasing and verify the required sampling-clock mode.
推薦
Power and Process Monitoring
The AD678BD is suitable for monitoring systems that periodically sample slowly changing or moderately dynamic analog quantities. A 200 kSPS converter provides ample sampling margin for many temperature, pressure, position, and power-rail monitoring channels, while its integrated sample-and-hold amplifier, reference, and clock generation simplify each acquisition path. The complete monolithic construction can reduce board complexity compared with separate ADC, reference, and clock components. For power monitoring, the selected external divider, protection network, and analog filter determine the usable measurement range and are not specified by the supplied data. Review input ratings, leakage behavior, conversion accuracy, and operating-temperature limits in the current datasheet before connecting sensor or power-system nodes.
推薦
Communications and Modulation Equipment
The AD678BD can support communications, modulation, and waveform-monitoring subsystems requiring a compact 12-bit sampling converter with an integrated signal chain. Its 200 kSPS capability is useful when the system must sample envelope, control, or supervisory analog information and present it to digital processing circuitry through a microprocessor-compatible bus. The internal reference and clock-generation blocks help reduce subsystem complexity, but they do not eliminate the need to evaluate noise, reference behavior, and acquisition timing in the final design. Analog Devices specifically identifies dynamic signal-to-noise-plus-distortion, total harmonic distortion, and intermodulation distortion as important AD678 specifications. Obtain their guaranteed values from the official datasheet, and use the AD679 upgrade path only when 14-bit resolution is preferable to the AD678's higher 200 kSPS sampling rate.
推薦
Legacy Embedded Control Systems
The AD678BD fits legacy embedded-control and industrial-control assemblies that use a 28-pin ceramic DIP footprint and require a microprocessor-compatible ADC interface. Its integrated sample-and-hold amplifier, voltage reference, clock-generation circuitry, and flash converter provide a complete acquisition path without a separate ADC subsystem. The architecture is particularly relevant where the existing board already has through-hole routing and a processor bus designed around the AD678 pinout. Because AD678BD is an older-style ceramic-package device, engineers should verify active availability, environmental grade, and screened or nonscreened ordering options. AD678AD is the most explicitly documented complete replacement, while AD678TD and AD678TD/883B require closer review of temperature grade and military-processing requirements.
推薦
推薦產品摘要
工程參考資料，適用於 AD678BD — 比較、設計指引及合規資訊。
選型指南
與替代品比較
| 參數 | 本產品 | AD678AD | AD678TD | AD678TD/883B | AD678AZ | AD678BZ |
|---|---|---|---|---|---|---|
| Brand | Analog Devices | Analog Devices | Analog Devices | Analog Devices | Analog Devices | Analog Devices |
| Package | 28-pin CDIP (SB) | 28-pin CDIP (SB) - same | 28-pin CDIP (SB) - same | 28-pin CDIP (SB) - same | 28-pin CDIP (SB) - same | 28-pin CDIP (SB) - same |
| Converter Type | Monolithic sampling ADC | Monolithic sampling ADC | AD678-family sampling ADC | AD678-family sampling ADC | AD678-family sampling ADC | AD678-family sampling ADC |
| Resolution | 12 bit | 12 bit | 12 bit | 12 bit | 12 bit | 12 bit |
| Maximum Sampling Rate | 200 kSPS | 200 kSPS | 200 kSPS | 200 kSPS | 200 kSPS | 200 kSPS |
| Input Channels | 1 channel | 1 channel | 1 channel | 1 channel | 1 channel | 1 channel |
| Integrated Functions | SHA, microprocessor-compatible interface, voltage reference, clock generation | AD678-family integrated sampling converter | AD678-family integrated sampling converter | AD678-family integrated sampling converter | AD678-family integrated sampling converter | AD678-family integrated sampling converter |
主要差異化特點
- Documented complete package replacement (對比AD678AD)
- Higher sampling rate than the same-pinout upgrade path (對比AD679)
- Specific screened-family option (對比AD678TD)
設計說明
Do not assume that every AD678 suffix is an interchangeable procurement choice. AD678AD is the candidate explicitly described by the supplied cross-reference result as a complete replacement, while AD678TD and AD678TD/883B may differ in temperature grade or military processing. Before substituting any listed part, compare the full ordering code, ceramic package construction, operating-temperature range, screening status, and electrical specifications. The AD679 shares the pinout but provides 14-bit resolution and only 128 kSPS, so it is an upgrade-path device rather than a transparent functional substitute.
Use the AD678 datasheet's recommended analog and digital grounding arrangement when planning the 28-pin CDIP layout. Place the converter in a stable through-hole footprint, route the analog input away from digital outputs and clock lines, and minimize resistance and inductance between any external input-conditioning components and the converter pins. Although the AD678 integrates a sample-and-hold amplifier, voltage reference, and clock generation, external bypass and input-filter components may still be necessary. The supplied excerpts do not specify capacitor values, so use the manufacturer recommendations rather than generic values.
The 200 kSPS conversion capability must be matched by an appropriate analog bandwidth and sampling-clock design. Limit input bandwidth to prevent aliasing, allow adequate acquisition settling, and account for the sample-and-hold amplifier's acquisition characteristics before sampling. Because the verified data does not provide guaranteed acquisition time, input bandwidth, signal-to-noise-plus-distortion ratio, total harmonic distortion, or intermodulation distortion, these values must be obtained from the current Analog Devices datasheet before calculating filter and clock margins.
Follow the official datasheet for analog and digital supply arrangements, decoupling, and permissible supply combinations; the supplied sources do not state supply voltage, supply current, or reference specifications. Decoupling requirements should be implemented close to the appropriate device pins, with analog and digital return currents kept separate as far as the package and board construction permit. Do not infer supply limits or sequencing requirements from the internal reference and clock blocks, because those blocks do not guarantee that every external power configuration is valid.
合規資訊
The verified sources state that MIL-STD-883-compliant versions are available, but no exact RoHS, REACH, AEC-Q100, lead-free, halogen-free, or conflict-minerals declaration for AD678BD was supplied. AEC-Q100 is not applicable because the sources describe a MIL-STD-883 rather than an automotive qualification.
