AD7675ACPZRL - 16-Bit 100kSPS Differential SAR ADC | Analog Devices
MPN： AD7675ACPZRL ✓ 啟用中AD7675ACPZRL 概覽
A SAR ADC is a precision converter that resolves a sampled analog voltage one bit per clock cycle using a binary-weighted capacitor network and a comparator, settling to its final code without pipeline latency. The AD7675 belongs to the broader ADC family -> data converters -> mixed-signal ICs -> semiconductors, and is targeted at precision multi-channel data-acquisition front ends where DC accuracy and AC linearity must coexist.
Key features include 94 dB typical SNR at 45 kHz input, -110 dB typical THD at 45 kHz, both AC and DC specified performance, parallel (8-/16-bit) and serial 5 V/3 V logic interfaces, SPI-/QSPI-/MICROWIRE-/DSP-compatible serial modes, single 5 V analog supply operation, and 15 mW typical power dissipation at 100 kSPS. The LFCSP-48 exposed pad keeps thermal resistance low enough for the 15 mW dissipation without an external heat sink.
The internal architecture combines a high-bandwidth differential track-and-hold, a precision 16-bit charge-redistribution SAR core, and an on-chip reference buffer. The lack of pipeline delay makes the part immediately usable in multiplexed systems, servo loops, and event-triggered sampling applications where latency must be deterministic.
Typical applications include industrial process control and data acquisition, medical instrumentation, spectrum and vibration analysis, automated test equipment (ATE), and precision multi-channel instrumentation. The bipolar ±2.5 V input also simplifies direct connection to load-cell bridges and thermocouple front-ends after signal conditioning.
When designing with this device, pair the analog supply with a 10 uF + 0.1 uF decoupling network placed within 5 mm of the AVDD pin, and solder the exposed pad to a continuous ground pour to achieve the rated thermal performance. Source-impedance should remain below 50 ohm to avoid degrading THD at the rated sample speed.
直接替換替代品，適用於 AD7675ACPZRL — 相同封裝，腳位對腳位相容。需重新設計 PCB 的不同封裝零件不列入。
此系列的變體
與下列產品可直接替換的同系列型號： AD7675ACPZRL （相同外形與佔位） — 差異在於 Data Interface, Operating Temperature, Input Voltage Range, No Missing Codes, Number of Channels.
AD7675ACPZ
✅ 直接替換📋 參考替代品（不在目錄中）
AD7675BCPZRL
✅ 直接替換📋 參考替代品（不在目錄中）
AD7674ACPZRL
✅ 直接替換聯絡詢價
查看資料表 →AD7650ACPZRL
✅ 直接替換聯絡詢價
查看資料表 →AD7641BCPZRL
✅ 直接替換聯絡詢價
查看資料表 →ADS8481IRGZR
✅ 直接替換聯絡詢價
查看資料表 →AD7675ACPZRL 最大額定值與電氣特性
| 解析度 | 16 Bits |
| Number of ADC Channels | 1 (Differential) |
| Converter Type | SAR (Successive Approximation Register) |
| Throughput / Sample Rate | 100 kSPS |
| Differential Input Range | ±2.5 V |
| Integral Nonlinearity (INL) | 1.5 LSB Max (0.0015% of FS) |
| Signal-to-Noise + Distortion (SINAD) | 94 dB typ @ 45 kHz |
| Total Harmonic Distortion (THD) | -110 dB typ @ 45 kHz |
| No Missing Codes | 16 Bits, Guaranteed |
| Data Interface | Parallel (8/16-bit) and Serial (SPI/QSPI/MICROWIRE/DSP-compatible) |
| Logic Interface Voltage | 5 V / 3 V |
| Analog Supply Voltage | 5 V single supply |
| Power Dissipation | 15 mW typical @ 100 kSPS |
| 封裝 / 外殼 | 48-LFCSP-VQ (7x7 mm) with Exposed Pad |
| Packaging | Tape & Reel (TR) |
| Pipeline Delay | None (SAR architecture) |
| RoHS 狀態 | Compliant |
AD7675ACPZRL 腳位配置
| 腳位 1 | DVDD — Digital supply (3V/5V) |
| 腳位 2 | OGND — Digital ground |
| 腳位 3 | DB0 — Data bit 0 (LSB), parallel mode |
| 腳位 4 | DB1 — Data bit 1, parallel mode |
| 腳位 5 | DB2 — Data bit 2, parallel mode |
| 腳位 6 | DB3 — Data bit 3, parallel mode |
| 腳位 7 | DB4 — Data bit 4, parallel mode |
| 腳位 8 | DB5 — Data bit 5, parallel mode |
| 腳位 9 | DB6 — Data bit 6, parallel mode |
| 腳位 10 | DB7 — Data bit 7, parallel mode |
| 腳位 11 | DB8 — Data bit 8, parallel mode (high byte) |
| 腳位 12 | DB9 — Data bit 9, parallel mode |
| 腳位 13 | DB10 — Data bit 10, parallel mode |
| 腳位 14 | DB11 — Data bit 11, parallel mode |
| 腳位 15 | DB12 — Data bit 12, parallel mode |
| 腳位 16 | DB13 — Data bit 13, parallel mode |
| 腳位 17 | DB14 — Data bit 14, parallel mode |
| 腳位 18 | DB15 — Data bit 15 (MSB), parallel mode |
| 腳位 19 | DGND — Digital ground |
| 腳位 20 | SER/PAR — Interface mode select (serial/parallel) |
| 腳位 21 | OB/2C — Output coding / 2's complement select |
| 腳位 22 | WARP — Warp/normal mode select |
| 腳位 23 | IMPULSE — Impulse/normal mode select |
| 腳位 24 | CS — Chip select input |
| 腳位 25 | RD — Read input (parallel mode) |
| 腳位 26 | WR — Write / start conversion input |
| 腳位 27 | BUSY — Conversion in progress output |
| 腳位 28 | DCEN — Daisy-chain enable |
| 腳位 29 | SDOUT — Serial data output |
| 腳位 30 | SCLK — Serial clock input |
| 腳位 31 | SYNC — Synchronization input (serial mode) |
| 腳位 32 | DGND — Digital ground |
| 腳位 33 | AVDD — Analog supply (5V) |
| 腳位 34 | AGND — Analog ground |
| 腳位 35 | IN+ — Differential analog input positive |
| 腳位 36 | IN- — Differential analog input negative |
| 腳位 37 | REF — Reference voltage input (decouple) |
| 腳位 38 | REFGND — Reference ground |
| 腳位 39 | CAPB — Bypass capacitor, reference buffer |
| 腳位 40 | CAPA — Bypass capacitor, reference buffer |
| 腳位 41 | AGND — Analog ground |
| 腳位 42 | AGND — Analog ground |
| 腳位 43 | NC — Not connected |
| 腳位 44 | NC — Not connected |
| 腳位 45 | NC — Not connected |
| 腳位 46 | NC — Not connected |
| 腳位 47 | NC — Not connected |
| 腳位 48 | EP — Exposed pad (must be soldered to AGND) |
典型應用
AD7675ACPZRL 適用於 6 應用s: Industrial Process Control & Data Acquisition, Medical Instrumentation & Patient Monitoring, Spectrum & Vibration Analysis, Automated Test Equipment (ATE) & Instrumentation, Precision Multi-Channel Instrumentation Modules, Power-Line Monitoring & Industrial Sensors.
Industrial Process Control & Data Acquisition
The AD7675ACPZRL's 16-bit resolution with 1.5 LSB INL max and ±2.5 V bipolar differential input range suit it directly to industrial process-control front ends. Designers commonly pair the ADC with the AD8275 or AD8421 instrumentation amplifier for 4-20 mA loop and bridge-transducer signal conditioning; the converter's 100 kSPS rate and zero pipeline delay enable deterministic loop-cycle sampling. The 48-LFCSP-VQ footprint and 15 mW dissipation keep thermal and PCB real-estate budgets reasonable even in dense multi-channel modules.
推薦
Medical Instrumentation & Patient Monitoring
In medical instrumentation such as patient monitors, infusion-pump sensors, and bench-top analyzers, the AD7675ACPZRL's 94 dB SINAD at 45 kHz preserves diagnostic signal integrity while the ±2.5 V bipolar input accepts biopotential and bridge signals directly. The deterministic zero-pipeline-delay conversion is critical when the instrument must react to an event within a defined sample window. Combined with the 48-LFCSP-VQ 7x7 mm footprint and 15 mW dissipation, the part fits compact portable medical devices that require IEC 60601-grade analog front ends.
推薦
Spectrum & Vibration Analysis
The AD7675ACPZRL's -110 dB THD at 45 kHz and 100 kSPS throughput make it well suited to spectrum and vibration analysis of audio-bandwidth mechanical and acoustic signals. Designers commonly pair the ADC with an anti-aliasing low-pass filter followed by an FFT in a DSP or FPGA; the zero pipeline delay simplifies block-based acquisition timing. The exposed-pad 48-LFCSP-VQ package also keeps the noise-sensitive analog ground path tightly controlled, preserving SFDR in dense multi-channel analyzers.
推薦
Automated Test Equipment (ATE) & Instrumentation
For automated test equipment and precision bench instruments, the AD7675ACPZRL delivers 16-bit precision with 1.5 LSB INL max from a single 5 V supply, simplifying ATE pin-electronics channel design. The dual parallel/serial 5 V/3 V interface lets the same PCB serve both legacy parallel DSPs and modern SPI-controlled MCUs. Zero pipeline delay enables deterministic stimulus-response timing in production test fixtures, while 15 mW dissipation supports high-channel-count ATE backplanes without thermal concerns.
推薦
Precision Multi-Channel Instrumentation Modules
In multi-channel precision instrumentation modules - such as weighing scales, load-cell readouts, and strain-gauge data loggers - the AD7675ACPZRL's ±2.5 V bipolar differential input directly digitizes full-bridge sensor outputs without external level shifting. Designers commonly parallelize multiple AD7675 channels behind a single digital controller, leveraging the 100 kSPS per-channel rate to sustain aggregate system throughput. The 48-LFCSP-VQ 7x7 mm footprint allows high channel density on standard 4-layer PCBs.
推薦
Power-Line Monitoring & Industrial Sensors
The AD7675ACPZRL's 100 kSPS rate and ±2.5 V true bipolar differential input match the dynamic range of power-line monitoring current shunts and isolated transducer outputs in industrial installations. When used with an isolation amplifier such as the AD202 or ADuM3190, the ADC can digitize high-voltage bus currents safely while preserving 16-bit accuracy. Zero pipeline delay ensures transient fault detection within a single sample cycle, critical for protective relaying and power-quality analyzers.
推薦
推薦產品摘要
工程參考資料，適用於 AD7675ACPZRL — 比較、設計指引及合規資訊。
選型指南
與替代品比較
| 參數 | 本產品 | AD7675ACPZ | AD7675BCPZRL | AD7674ACPZRL | AD7650ACPZRL | ADS8481IRGZR |
|---|---|---|---|---|---|---|
| Brand | Analog Devices | Analog Devices | Analog Devices | Analog Devices | Analog Devices | Texas Instruments |
| Package | 48-LFCSP-VQ (7x7 mm) | 48-LFCSP-VQ (7x7 mm) - same | 48-LFCSP-VQ (7x7 mm) - same | 48-LFCSP-VQ (7x7 mm) - same | 48-LFCSP-VQ (7x7 mm) - same | 48-QFN (7x7 mm) - same footprint |
| Resolution | 16 bits | 16 bits | 16 bits | 16 bits | 16 bits | 18 bits |
| Sample Rate | 100 kSPS | 100 kSPS | 100 kSPS | 100 kSPS | 500+ kSPS | 1 MSPS |
| Power Dissipation | 15 mW typ | 15 mW typ | 15 mW typ | Similar | Higher (500 kSPS) | Higher (1 MSPS) |
主要差異化特點
- True bipolar ±2.5 V differential input on a single 5 V supply (對比ADS8481IRGZR)
- Zero pipeline delay for deterministic sampling (對比AD7650ACPZRL)
- Both parallel and serial interfaces on a single pinout (對比AD7674ACPZRL)
設計說明
The AD7675ACPZRL requires a clean analog 5 V (AVDD) supply and a separately filtered digital 5 V or 3 V (DVDD) supply. Place a 10 uF tantalum plus a 0.1 uF ceramic decoupling capacitor within 5 mm of the AVDD pin and an identical pair on DVDD. Reference the datasheet recommended layout to keep the digital return currents from coupling back into the analog ground plane; the exposed pad must be soldered to a clean AGND pour to minimize ground bounce and thermal resistance.
Source impedance on the IN+ and IN- pins must remain below approximately 50 ohm at the rated sample speed to avoid degrading THD. If the upstream op-amp or driver has higher output impedance, insert a wide-bandwidth buffer such as the AD8275 immediately before the ADC inputs. Also, the CAPA/CAPB reference-buffer capacitors must be installed exactly as shown in the datasheet typical connection diagram - omitting or substituting them will result in large INL and gain errors.
Route the parallel data bus (DB0-DB15) as short, length-matched traces to minimize skew; if only the high byte (DB8-DB15) is read in 8-bit parallel mode, the layout can be simplified but the unused low-byte traces should still be routed or terminated to avoid reflections. Keep the analog input traces (IN+, IN-) as a true differential pair with continuous ground reference on both sides, and keep them physically separated from the digital bus to preserve 94 dB SINAD.
Estimated: at 15 mW dissipation and the 48-LFCSP-VQ 7x7 mm package typical theta_JA of approximately 28 C/W on a standard 4-layer JEDEC test board, the junction temperature rise above ambient is about 0.4 C - well within the rated operating range. Nevertheless, always solder the exposed pad to a continuous AGND copper pour of at least 1 square inch to stay within the datasheet thermal envelope and to keep the analog ground reference stable.
合規資訊
RoHS compliant per Analog Devices product page and distributor listings. Not AEC-Q100 qualified - this part targets industrial/medical instrumentation, not automotive. Halogen-free status not explicitly stated in the verified web data; see ADI environmental compliance page for the latest statement.
