AK5381ET - 24-Bit Stereo 96 kHz ADC | Asahi Kasei
MPN： AK5381ET ✗ 停產AK5381ET 概覽
An audio ADC is a data-acquisition IC that converts left and right analog audio signals into digital words for transmission to a DSP, digital mixer, audio codec, or digital recording system. The AK5381 belongs to the stereo ADC, delta-sigma ADC, audio data-converter, and integrated-circuit hierarchies. Enhanced dual-bit delta-sigma modulation supports its high-resolution conversion function while the digital decimation filter and serial interface provide the resulting audio data to the following processing stage.
The principal device characteristics include 24-bit resolution, a maximum sampling rate of 96 kHz, and a 4 kHz minimum sampling rate. The converter supports a 2.7 V to 5.5 V operating supply range and uses I2S serial audio. Its differential analog and digital ground pins help engineers separate analog signal return paths from digital return paths, while AGND, DGND, and VCOM support the converter’s internal analog reference arrangement.
The AK5381ET is intended for high-end audio systems in which two channels must be digitized at rates suitable for CD-quality and higher-resolution playback. Its architecture is based on enhanced dual-bit delta-sigma techniques, which provide a straightforward interface between an analog audio front end and a digital audio processing chain. System clocks are handled through MCLK, CKS0, CKS1, and CKS2-related functions, while LRCK, SCLK, and SDTO support serial audio transfer.
Typical applications include professional audio equipment, multichannel mixers, digital recording consoles, high-resolution audio interfaces, and consumer playback systems. The 4 kHz-to-96 kHz range makes the converter suitable for voice, conventional CD-rate audio, and higher-rate digital-audio paths. Its two-channel architecture supports balanced stereo conversion when the circuit is arranged according to the manufacturer’s application guidance.
The principal design consideration is maintaining clean, quiet analog and digital power rails while preserving the converter’s clock and data timing integrity. Place decoupling capacitors close to the supply pins, route analog and digital returns according to the pin-description and layout guidance in the manufacturer datasheet, and keep high-current digital clock traces isolated from the analog input network.
This product page consolidates the AK5381ET conversion capabilities, interface details, pin constraints, application guidance, and documented drop-in considerations into an engineering-oriented reference. It also distinguishes verified device attributes from parameters that require confirmation before layout, sourcing, or production release.
直接替換替代品，適用於 AK5381ET — 相同封裝，腳位對腳位相容。需重新設計 PCB 的不同封裝零件不列入。
此系列的變體
與下列產品可直接替換的同系列型號： AK5381ET （相同外形與佔位） — 差異在於 Package.
AK5381VT
✅ 直接替換📋 參考替代品（不在目錄中）
AK5380
✅ 直接替換📋 參考替代品（不在目錄中）
AK5381ET 最大額定值與電氣特性
| Product Type | Stereo delta-sigma audio ADC |
| 解析度 | 24 bit |
| Maximum Sampling Rate | 96 kHz |
| Minimum Sampling Rate | 4 kHz |
| Number of Channels | 2 channels |
| 工作電源電壓 | 2.7 V to 5.5 V |
| Conversion Architecture | Enhanced dual-bit delta-sigma |
| Digital Audio Interface | I2S |
| 封裝 | 16-pin TSSOP, 0.65 mm pitch |
| 工作溫度範圍 | -20 °C to +85 °C |
| Analog Inputs | AINL and AINR |
| Analog Supply | VA |
| Digital Supply | VD |
| Analog Ground | AGND |
| Digital Ground | DGND |
| Clock Inputs | MCLK, CKS0, CKS1, and CKS2 functions |
| Serial Audio Signals | LRCK, SCLK, and SDTO |
| Voltage Reference | VCOM |
AK5381ET 16-pin tssop, 0.65 mm pitch 腳位配置指南
AK5381ET（16-pin tssop, 0.65 mm pitch 封裝）的腳位配置。 此類比元件具有輸入、輸出與電源腳位。偏移歸零、補償與致能腳位配置請參閱製造商資料表。適用於訊號調理與放大器電路。
無詳細腳位定義資料： AK5381ET.
請參閱 資料表 以查看完整腳位配置。
典型應用
AK5381ET 適用於 6 應用s: Professional Stereo Audio Interface, Digital Recording Console, High-End CD Player, Digital Mixing Console, Multichannel Home Theater Preamplifier, Voice Recording and Broadcast Equipment.
Professional Stereo Audio Interface
The AK5381ET fits a professional stereo conversion front end because it digitizes two analog channels at up to 96 kHz with 24-bit resolution and returns the data through I2S. Place the converter near the input amplifier, keep AINL and AINR routing short, and use separate AGND and DGND return paths to reduce converter-generated noise in the microphone or line-level signal path. The 4 kHz-to-96 kHz range supports speech, CD-rate audio, and higher-resolution studio workflows, while the 2.7 V to 5.5 V supply range accommodates conventional embedded rails. Confirm clock mode, input range, and digital timing against the manufacturer application circuit before production.
推薦
Digital Recording Console
The AK5381ET can serve as the stereo conversion stage in a digital recording console, capturing left and right channels at rates up to 96 kHz for downstream mixing and storage. Its 24-bit output resolution preserves the precision needed by professional editing workflows, while I2S provides a conventional connection to a DSP or digital mixer. Keep the converter away from high-current power stages, use quiet local decoupling on VA and VD, and establish controlled clock and data routes to prevent switching activity from entering the analog inputs. The operating range of -20 °C to +85 °C covers many indoor equipment environments, while AK5381VT should be considered for colder installations.
推薦
High-End CD Player
The AK5381ET is appropriate for a high-end digital playback system that converts a stereo analog source at up to 96 kHz before digital processing and DAC conversion. Its 24-bit delta-sigma architecture is aimed at high-end audio applications, and its I2S output can feed a digital audio processor without using a parallel data bus. In this design, the major performance concern is preserving low-noise analog behavior at the input and reference node rather than maximizing digital throughput. Use short input traces, quiet supply routing, and careful AGND-to-DGND partitioning. If the source operates at 44.1 kHz or 48 kHz, the converter’s 4 kHz-to-96 kHz range provides suitable timing flexibility.
推薦
Digital Mixing Console
The AK5381ET is well suited to line-input channels in a digital mixing console because it converts two balanced or unbalanced analog paths into synchronized I2S audio streams. A 96 kHz maximum rate supports high-resolution multitrack workflows, and the 2.7 V-to-5.5 V operating range permits integration with either a 3.3 V or 5 V digital subsystem. Board-level implementation should isolate converter ground currents from mixer power and output stages, while maintaining short clock paths from the audio master clock. The dual-channel architecture reduces the converter count for stereo input strips, although each channel still requires its own input conditioning and reference design approved for the intended source level.
推薦
Multichannel Home Theater Preamplifier
The AK5381ET can support stereo digital-audio input or channel-pair conversion within a home-theater preamplifier, particularly when a 24-bit, 96 kHz conversion path is required. Its dual delta-sigma channels provide digital stereo data to the main audio processor, and the I2S interface is suitable for a traceable digital interconnect. Layout quality remains critical because long analog inputs or an improperly implemented VCOM network can degrade the signal before conversion. Separate analog supply filtering from digital clock supply current, and keep the LRCK, SCLK, and SDTO routes away from AINL and AINR. Use the manufacturer reference configuration to establish input scaling and anti-alias filtering for each source.
推薦
Voice Recording and Broadcast Equipment
The AK5381ET can digitize stereo line inputs in broadcast or voice-recording equipment at sampling rates selected for the capture standard. Its 4 kHz minimum rate supports narrowband speech tasks, while the 96 kHz ceiling permits higher-rate capture for quality-critical installations. The converter’s digital output can feed an embedded processor for level control, mixing, storage, or network transmission. Analog conditioning remains the designer’s responsibility: configure AINL and AINR for the source amplitude, observe the absolute input limits, and preserve common-mode and ground behavior through the first amplification stage. The standard ET grade operates from -20 °C to +85 °C, so deployments below that range should evaluate the AK5381VT.
推薦
推薦產品摘要
工程參考資料，適用於 AK5381ET — 比較、設計指引及合規資訊。
選型指南
與替代品比較
| 參數 | 本產品 | AK5381VT | AK5380 | AK5357ET |
|---|---|---|---|---|
| Brand | Asahi Kasei Microdevices | Asahi Kasei Microdevices | Asahi Kasei Microdevices | Asahi Kasei Microdevices |
| Package | 16-pin TSSOP, 0.65 mm pitch | 16-pin TSSOP, 0.65 mm pitch | 16-pin TSSOP, 0.65 mm pitch | 16-pin TSSOP, 0.65 mm pitch |
主要差異化特點
- Standard-temperature AK5381 family option with direct package continuity (對比AK5381VT)
- Documented pin compatibility within the AKM converter portfolio (對比AK5380)
- Same-family stereo conversion alternative with matching terminal format (對比AK5357ET)
設計說明
Route AINL and AINR as short, symmetrical analog paths and place their input-network components close to the converter. Keep MCLK, SCLK, LRCK, and SDTO away from the analog input traces, particularly beneath or beside high-impedance nodes. The manufacturer pin layout distinguishes AGND from DGND; follow its ground-return guidance rather than merging the two nets indiscriminately. A quiet analog section and a separate digital return path reduce the chance that switching current from the I2S interface will appear in the converted audio.
Provide local, low-inductance decoupling for VA and VD using the capacitance and placement specified in the manufacturer application circuit. Place each capacitor at the relevant supply pin and keep the connection between the capacitor, via, and package lead as short as practical. Check VA and VD against the 2.7 V-to-5.5 V operating range under startup, clocking, and maximum-channel activity. Because the exact decoupling values are not stated in the product-page excerpts, use the manufacturer datasheet and application schematic as the release authority.
Treat MCLK, SCLK, and LRCK as timing-critical signals and route them over continuous reference planes without unnecessary test-point stubs. Confirm source-device I2S timing, master-clock ratio, and data alignment against the AK5381ET timing diagrams. A mismatch in clock mode or sample-rate divider settings can produce incorrect channel alignment even when the physical connection is correct. Use the same MCLK source for synchronous audio devices unless the system architecture explicitly supports independent clocks.
Do not select a replacement solely from the package outline. AK5381VT is the closest temperature-grade alternative, while AK5380 and AK5357ET require closer review of clock, operating-mode, and channel behavior. In every case, compare the complete pin description, electrical limits, I2S format, master-clock requirements, and startup sequence. A common footprint reduces PCB rework but does not by itself guarantee that a design can be changed without component-level or firmware modifications.
合規資訊
Compliance attributes are not stated in the manufacturer or distributor excerpts. AEC-Q100 status is shown as unknown because this audio converter is not identified as an automotive-qualified device in the cited material.
