ATSAM3N2AA-MU - 48MHz Cortex-M3 MCU 128KB Flash | Microchip
MPN： ATSAM3N2AA-MU ✓ 啟用中ATSAM3N2AA-MU 概覽
A microcontroller (MCU) is a single integrated circuit that combines a processor core, program memory, data memory, and peripherals into one chip, forming the complete intelligence of an embedded system. Within the power-management hierarchy of embedded design, the SAM3N series sits in the cost-sensitive 32-bit MCU segment, built on the ARM Cortex-M3 RISC processor architecture and programmed with Thumb-2 instructions.
Key features include the ARM Cortex-M3 revision 2.0 core running to 48 MHz, a 24-bit SysTick counter, a nested vector interrupt controller (NVIC), and an internal oscillator that removes the need for an external crystal in many designs. The peripheral set integrates 2x USARTs, 2x UARTs, 2x TWI (I2C-compatible) interfaces, 3x SPI ports, 1 PWM timer, and 6x general-purpose timers, plus an 8-channel 10-bit ADC for analog sensing.
Technical depth: the SAM3N series is Atmel's entry point into Cortex-M3 technology, pin-to-pin compatible with the best-selling SAM7S and SAM3S series, and supports native Atmel QTouch capacitive touch (buttons, sliders, wheels). Advanced power management and low operating voltage capability (1.62V to 3.6V) reduce system power consumption.
Typical applications include industrial control boards, consumer appliances, capacitive-touch user interfaces, and cost-sensitive, high-volume embedded products where SAM3S performance is needed at reduced BOM cost.
Design consideration: choose the SAM3N over SAM3S when the reduced peripheral set of the N-series meets requirements, since it is pin-compatible and lowers cost; verify SRAM sizing for applications with large communication buffers.
This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet.
直接替換替代品，適用於 ATSAM3N2AA-MU — 相同封裝，腳位對腳位相容。需重新設計 PCB 的不同封裝零件不列入。
此系列的變體
與下列產品可直接替換的同系列型號： ATSAM3N2AA-MU （相同外形與佔位） — 差異在於 Package, Pin Compatibility, SRAM, Flash Memory, Program Memory Size.
ATSAM3N1AA-MU
✅ 直接替換 ⚠️ 規格未經驗證聯絡詢價
查看資料表 →ATSAM3N4AA-MU
✅ 直接替換 ⚠️ 規格未經驗證聯絡詢價
查看資料表 →ATSAM3N2AA-AU
✅ 直接替換 ⚠️ 規格未經驗證聯絡詢價
查看資料表 →ATSAM3S1AA-MU
✅ 直接替換聯絡詢價
查看資料表 →ATSAM3S2AA-MU
✅ 直接替換聯絡詢價
查看資料表 →ATSAM3S4AA-MU
✅ 直接替換聯絡詢價
查看資料表 →ATSAM3N2AA-MU 最大額定值與電氣特性
| Core Processor | ARM Cortex-M3 revision 2.0 |
| Core Size | 32-bit |
| Maximum Clock Speed | 48 MHz |
| Flash Memory | 128 KB (128K x 8) |
| SRAM | 16 KB (16K x 8) |
| Number of I/O | 34 |
| Supply Voltage Range | 1.62 V to 3.6 V |
| USART Peripherals | 2 |
| UART Peripherals | 2 |
| SPI Peripherals | 3 |
| TWI (I2C) Peripherals | 2 |
| PWM Channels | 1 PWM timer |
| General-Purpose Timers | 6 |
| ADC Resolution | 10-bit, 8 channels |
| Oscillator Type | Internal |
| Touch Support | Atmel QTouch capacitive touch (buttons/sliders/wheels) |
| 封裝 | 48-QFN (7x7 mm) with exposed pad |
| 安裝類型 | Surface Mount |
| Packaging | Tape & Reel (TR) |
| Instruction Set | Thumb-2 |
| Pin Compatibility | SAM7S and SAM3S series (48-pin versions) |
ATSAM3N2AA-MU 48-qfn (7x7 mm) with exposed pad 腳位配置指南
ATSAM3N2AA-MU（48-qfn (7x7 mm) with exposed pad 封裝）的腳位配置。 此數位 IC 包含 GPIO、通訊介面（UART、SPI、I2C）與電源腳位。替代腳位功能與配置選項請參閱製造商資料表。對嵌入式系統設計與 PCB 佈局至關重要。
無詳細腳位定義資料： ATSAM3N2AA-MU.
請參閱 資料表 以查看完整腳位配置。
典型應用
ATSAM3N2AA-MU 適用於 6 應用s: Industrial Control Boards, Capacitive Touch User Interfaces, Cost-Sensitive High-Volume Consumer Products, Sensor Acquisition and Data Logging, Migration from SAM7S Legacy Designs, Embedded Communication Nodes.
Industrial Control Boards
The ATSAM3N2AA-MU fits industrial control applications that need 32-bit processing at an aggressive price point. Its 48 MHz Cortex-M3 core executes control loops with Thumb-2 efficiency, while six general-purpose timers and one PWM timer handle motor control, PWM outputs, and event timing. The 8-channel 10-bit ADC digitizes sensor inputs such as temperature and current feedback, and the 2x USART, 2x UART, 3x SPI, and 2x TWI interfaces connect PLC-style peripherals, displays, and field communications. With 128 KB Flash and 16 KB SRAM, it supports bare-metal or RTOS firmware, and the 1.62V to 3.6V supply range simplifies power-tree design on 3.3V industrial boards. Pin compatibility with the SAM3S series gives designers a low-risk upgrade path if more peripherals are needed later.
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Capacitive Touch User Interfaces
The SAM3N series provides native Atmel QTouch capacitive touch support for buttons, sliders, and wheels, making the ATSAM3N2AA-MU a strong fit for appliance panels and HMI boards. QTouch is implemented via firmware libraries on the 48 MHz Cortex-M3 core, eliminating an external touch controller and reducing BOM cost - a core design goal of the SAM3N series. The 34 GPIO lines drive LEDs, backlight, and relays around the touch surface, while USART and TWI interfaces report touch events to a host controller. The internal oscillator reduces component count, and the 128 KB Flash provides ample room for the QTouch library plus application firmware. For higher channel counts or larger flash needs, the pin-compatible ATSAM3N4AA-MU drops onto the same 48-QFN footprint.
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Cost-Sensitive High-Volume Consumer Products
Atmel positions the SAM3N series as its entry point into Cortex-M3 technology, specifically targeting cost-sensitive, high-volume applications - the classic domain of small appliances, toys, chargers, and white-goods sub-boards. The ATSAM3N2AA-MU delivers 48 MHz 32-bit performance, 128 KB Flash, and 16 KB SRAM at a price point below the SAM3S equivalents, and its pin-to-pin compatibility with SAM3S and SAM7S lets one PCB design span multiple cost/performance tiers by swapping MPNs. The internal oscillator removes the crystal from the BOM, and the low 1.62V to 3.6V operating range enables battery-powered designs. Tape-and-reel packaging (standard quantity 3000+ units) supports automated high-volume SMT assembly.
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Sensor Acquisition and Data Logging
With an 8-channel 10-bit ADC, six general-purpose timers, and a 24-bit SysTick counter, the ATSAM3N2AA-MU is well suited for multi-channel sensor acquisition nodes. Multiple SPI and TWI interfaces allow simultaneous connection of digital sensors (accelerometers, pressure sensors, EEPROM) while the internal ADC reads analog channels such as thermistors and voltage dividers. The 2x USARTs support RS-232/RS-485 links for uploading logged data, and 16 KB SRAM buffers sensor samples between communication windows. Low operating voltage capability (1.62V) plus advanced power management extends battery life in portable loggers. Designers should budget SRAM carefully; if logging buffers exceed 16 KB, the pin-compatible ATSAM3N4AA-MU with 24 KB SRAM is a no-redesign upgrade.
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Migration from SAM7S Legacy Designs
The ATSAM3N2AA-MU is pin-to-pin compatible with the best-selling Atmel SAM7S series in 48-pin versions, per the official datasheet, making it the recommended migration target for aging SAM7S (ARM7TDMI) designs. Moving to the SAM3N2AA-MU upgrades the core from ARM7 to a 48 MHz Cortex-M3 with Thumb-2 code density and an NVIC, typically improving performance per MHz and simplifying interrupt handling. Since the pinout is unchanged, existing PCBs can often be reused with only firmware porting and supply verification (1.62V to 3.6V). Atmel explicitly describes the SAM3N as the ideal migration path from the SAM3S for reduced BOM cost, and the same drop-in logic applies to SAM7S legacy sockets at end-of-life.
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Embedded Communication Nodes
The ATSAM3N2AA-MU integrates 2x USARTs, 2x UARTs, 3x SPI ports, and 2x TWI interfaces - an unusually rich serial set for a 48-pin cost-optimized MCU. This makes it effective as a protocol-conversion and communication node: one USART can run RS-485 Modbus while another handles a debug console, SPI ports connect Ethernet-assist peripherals or flash, and TWI manages RTCs and sensors. The 48 MHz Cortex-M3 core comfortably services interrupt-driven serial stacks within 16 KB SRAM for simple protocols. High-speed serial delivery (SPI, UART) is cited by Atmel as a key SAM3N feature. For nodes needing more RAM for stacked protocols, the pin-compatible ATSAM3N4AA-MU upgrades memory without board changes.
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推薦產品摘要
工程參考資料，適用於 ATSAM3N2AA-MU — 比較、設計指引及合規資訊。
選型指南
與替代品比較
| 參數 | 本產品 | ATSAM3N1AA-MU | ATSAM3N4AA-MU | ATSAM3S2AA-MU | ATSAM3S4AA-MU |
|---|---|---|---|---|---|
| Package | 48-QFN (7x7 mm) exposed pad | 48-QFN (7x7 mm) - same | 48-QFN (7x7 mm) - same | 48-QFN (7x7 mm) - same | 48-QFN (7x7 mm) - same |
| Brand | Microchip Technology (Atmel) | Microchip Technology (Atmel) | Microchip Technology (Atmel) | Microchip Technology (Atmel) | Microchip Technology (Atmel) |
| Core / Max Speed | ARM Cortex-M3, 48 MHz | ARM Cortex-M3, 48 MHz | ARM Cortex-M3, 48 MHz | ARM Cortex-M3, 48 MHz | ARM Cortex-M3, 48 MHz |
| Flash Memory | 128 KB | 64 KB | 256 KB | 128 KB | 256 KB |
| Supply Voltage | 1.62 V to 3.6 V | 1.62 V to 3.6 V | 1.62 V to 3.6 V | 1.62 V to 3.6 V | 1.62 V to 3.6 V |
| Peripheral Set | 2 USART / 2 UART / 3 SPI / 2 TWI, 10-bit ADC | Same SAM3N peripheral set | Same SAM3N peripheral set | Enhanced SAM3S set (faster ADC, extra analog) | Enhanced SAM3S set (faster ADC, extra analog) |
| QTouch Support | Yes (native QTouch) | Yes (native QTouch) | Yes (native QTouch) | Yes (native QTouch) | Yes (native QTouch) |
主要差異化特點
- Lowest BOM cost within the pin-compatible family (對比ATSAM3S2AA-MU)
- Scalable memory on the same footprint (對比ATSAM3N4AA-MU)
- Legacy migration path from SAM7S (對比SAM7S 48-pin parts)
- Trade-off: fewer analog/serial features than SAM3S (對比ATSAM3S4AA-MU)
設計說明
Design the supply rail for 1.62V to 3.6V operation; 3.3V is the typical industrial rail and 1.8V suits battery designs. Decouple each VDD/VDDIO pin with 100 nF ceramic capacitors placed within 2 mm of the pin, plus one bulk 4.7 uF to 10 uF capacitor near the device. The 48-QFN exposed pad should be soldered to a grounded thermal pad on the PCB for both heat dissipation and ground return. Verify the ADC reference configuration matches the chosen VDD rail for accurate 10-bit conversions.
The 48-QFN (7x7 mm) package with exposed pad requires a matched land pattern with the center thermal via array (typically 4-9 vias) connected to the ground plane to ensure reliable soldering and low thermal resistance. Keep crystal (if used) traces short and place load capacitors close to the OSC pins; when running on the internal oscillator, keep high-current switching traces away from the device to reduce jitter. Follow the Atmel SAM3N hardware design guidelines in the datasheet for SWD programming header placement.
A common pitfall is confusing package suffixes: -MU is the 48-QFN (7x7), while -AU is 48-LQFP - they are not footprint-interchangeable despite the same die. Another pitfall is underestimating 16 KB SRAM; communication stacks (USB CDC, TCP/IP) can exhaust it quickly - budget statically with a linker map. Flash programming voltage and lock bits differ from legacy SAM7S parts, so update flash programming scripts when migrating. Finally, verify QTouch channel assignment against GPIO multiplexing tables, since touch channels share pins with SPI/USART functions.
合規資訊
Compliance status not stated in the retrieved web data; verify on the official Microchip product page or datasheet.
