ATSAMA5D26A-CN - 500MHz ARM Cortex-A5 MPU, 289-LFBGA | Microchip
MPN： ATSAMA5D26A-CN ✓ 啟用中ATSAMA5D26A-CN 概覽
An ARM Cortex-A5 MPU (Microprocessor Unit) is a 32-bit application-class processor core from ARM's Cortex-A family, designed for embedded applications requiring Linux/Android operating system support. The Cortex-A5 implements the ARMv7-A architecture with NEON media processing engine, floating-point unit, and TrustZone security extensions. MPUs like the SAMA5D2 series sit at the high end of the embedded processing hierarchy, above microcontrollers (MCUs) but below full application processors, providing GHz-class computing with rich OS support in power-constrained environments.
The ATSAMA5D26A variant differentiates from the base SAMA5D2 family by including the ARM TrustZone security extension and the AES/SHA hardware crypto accelerators, making it suited for secure-connected applications. The device supports multiple boot sources including QSPI NOR flash, e.MMC, SD card, and NAND flash through its dedicated QSPI and SDMMC interfaces. Hardware accelerated video decoding for H.264/VP8 and a 2D graphics engine for LCD output are integrated on-chip.
Typical applications include industrial IoT gateways, human-machine interface (HMI) panels, smart home control hubs, medical point-of-care devices, and secure-connected edge nodes. The Cortex-A5 core delivers strong single-thread performance while consuming typically under 500 mW at full CPU load, enabling fanless designs with passive cooling.
When designing with this device, allocate adequate PCB area for the 14x14 mm BGA package and use microvia/HDI PCB fabrication for signal escape. DDR3L memory routing must follow length-matched fly-by topology for stable operation at 533 MHz. Provide proper decoupling with 100 nF ceramic capacitors per power pin.
直接替換替代品，適用於 ATSAMA5D26A-CN — 相同封裝，腳位對腳位相容。需重新設計 PCB 的不同封裝零件不列入。
此系列的變體
與下列產品可直接替換的同系列型號： ATSAMA5D26A-CN （相同外形與佔位） — 差異在於 Package, Ethernet, Core Architecture, External Memory Support, Security Features.
ATSAMA5D26B-CN
✅ 直接替換聯絡詢價
查看資料表 →ATSAMA5D27A-CN
✅ 直接替換聯絡詢價
查看資料表 →ATSAMA5D26A-CN 最大額定值與電氣特性
| MPU Series | SAMA5D2 |
| Core Architecture | ARM Cortex-A5 (32-bit) |
| Maximum CPU Clock | 500 MHz |
| Core Count | 1 |
| Internal SRAM | 128 KB |
| External Memory Support | DDR2, DDR3L, LPDDR2, LPDDR3 |
| 封裝 | 289-LFBGA (14x14 mm) |
| Ball Count | 289 |
| Operating Voltage (Core) | 1.1 V to 1.32 V |
| Operating Voltage (I/O) | 1.65 V to 3.6 V |
| Ethernet | 2x 10/100/1000 GMAC |
| USB | USB 2.0 Host + Device with PHY |
| CAN | CAN-FD |
| Display Interface | LCD controller, up to WXGA resolution |
| Security Features | ARM TrustZone, AES, SHA, secure boot |
| 工作溫度範圍 | -40C to +85C (industrial) |
| 安裝類型 | Surface Mount |
| RoHS 狀態 | Compliant |
ATSAMA5D26A-CN 289-lfbga (14x14 mm) 腳位配置指南
ATSAMA5D26A-CN（289-lfbga (14x14 mm) 封裝）的腳位配置。 此數位 IC 包含 GPIO、通訊介面（UART、SPI、I2C）與電源腳位。替代腳位功能與配置選項請參閱製造商資料表。對嵌入式系統設計與 PCB 佈局至關重要。
無詳細腳位定義資料： ATSAMA5D26A-CN.
請參閱 資料表 以查看完整腳位配置。
典型應用
ATSAMA5D26A-CN 適用於 6 應用s: Industrial IoT Gateway, Human-Machine Interface (HMI) Panel, Smart Home Control Hub, Medical Point-of-Care Device, Secure-Connected Edge Node, Automotive Infotainment Head Unit.
Industrial IoT Gateway
The ATSAMA5D26A-CN serves as the main application processor in industrial IoT gateways, where its 500 MHz ARM Cortex-A5 core runs Linux for protocol conversion between fieldbus (Modbus, CAN-FD, EtherCAT) and cloud MQTT/HTTPS pipelines. The dual Gigabit Ethernet MAC enables daisy-chained ring topologies common in factory automation, while ARM TrustZone and AES/SHA hardware accelerators secure data at rest and in transit. Typical design dissipates under 2 W at full CPU load, enabling fanless DIN-rail enclosures with extended -40C to +85C operation.
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Human-Machine Interface (HMI) Panel
In HMI panels, the ATSAMA5D26A-CN drives TFT LCD displays up to WXGA resolution through its integrated LCD controller while running Qt/Linux touch interfaces. The 128 KB internal SRAM enables deterministic touch-response buffering without external memory contention. Hardware 2D graphics acceleration accelerates UI rendering at 60 fps, while the CAN-FD peripheral interfaces with industrial PLCs. Power dissipation typically under 1.5 W supports sealed panel-mount designs with no cooling fan.
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Smart Home Control Hub
The ATSAMA5D26A-CN powers smart home gateways aggregating Zigbee, Z-Wave, Wi-Fi, and Bluetooth Low Energy protocols through its rich peripheral set including multiple UART, SPI, and I2C interfaces. The ARM Cortex-A5 at 500 MHz runs Linux with Home Assistant or OpenHAB stacks, while TrustZone isolates security-critical credential storage. USB 2.0 host with PHY supports direct-connected Z-Wave dongles, and the LCD controller drives status displays. Typical BOM cost targets under $50 for the MPU plus memory.
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Medical Point-of-Care Device
The ATSAMA5D26A-CN enables medical point-of-care devices such as portable blood analyzers and patient monitors where its industrial temperature range and low power consumption meet IEC 60601-1 requirements. The Cortex-A5 core processes sensor data with hardware floating-point unit acceleration, while the LCD controller drives medical-grade displays. ARM TrustZone secures patient health information (PHI) per HIPAA requirements, and the AES engine encrypts data at rest. Fanless operation eliminates contamination risk in clinical environments.
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Secure-Connected Edge Node
In secure edge computing nodes for retail POS or building access control, the ATSAMA5D26A-CN provides hardware-rooted security through ARM TrustZone combined with secure boot from QSPI flash. The AES/SHA accelerators offload TLS handshake computations, reducing connection latency for cloud-synchronized devices. Dual Gigabit Ethernet enables bridged network topologies, while CAN-FD interfaces with building automation systems. Linux with SELinux or OP-TEE provides defense-in-depth software security layers.
推薦
Automotive Infotainment Head Unit
Although not AEC-Q100 qualified, the ATSAMA5D26A-CN serves in non-safety automotive applications like rear-seat entertainment and aftermarket infotainment head units. The Cortex-A5 at 500 MHz runs Linux with audio/video codecs, while the integrated LCD controller drives 7-10 inch touchscreens. CAN-FD interfaces with vehicle networks for time/clock sync, and USB 2.0 host supports external media playback. Hardware crypto secures connected-car telemetry data per UNECE WP.29 requirements.
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推薦產品摘要
工程參考資料，適用於 ATSAMA5D26A-CN — 比較、設計指引及合規資訊。
選型指南
與替代品比較
| 參數 | 本產品 | ATSAMA5D26B-CN | ATSAMA5D27A-CN |
|---|---|---|---|
| Brand | Microchip Technology | Microchip Technology | Microchip Technology |
| Package | 289-LFBGA (14x14 mm) | 289-LFBGA (14x14 mm) - same | 289-LFBGA (14x14 mm) - same |
| Core Architecture | ARM Cortex-A5 | ARM Cortex-A5 | ARM Cortex-A5 |
| Maximum CPU Clock | 500 MHz | 500 MHz | 1 GHz capable |
| Internal SRAM | 128 KB | 128 KB | 128 KB |
| External Memory Support | DDR2/DDR3L/LPDDR2/LPDDR3 | DDR2/DDR3L/LPDDR2/LPDDR3 | DDR2/DDR3L/LPDDR2/LPDDR3 |
| Security Features | TrustZone + AES/SHA | TrustZone + AES/SHA | TrustZone + AES/SHA + secure element |
| Ethernet | 2x Gigabit GMAC | 2x Gigabit GMAC | 2x Gigabit GMAC |
| Operating Temperature | -40C to +85C (industrial) | -40C to +85C (industrial) | -40C to +85C (industrial) |
主要差異化特點
- Integrated hardware crypto accelerators with TrustZone (對比ATSAMA5D24A-CU)
- Silicon revision B update for silicon errata fixes (對比ATSAMA5D26B-CN)
- 1 GHz capable upgrade path in same package (對比ATSAMA5D27A-CN)
設計說明
The 289-LFBGA package uses 0.65 mm ball pitch, which requires HDI PCB fabrication with microvias (typically laser-drilled) for proper signal escape from inner balls. Per Microchip design guidelines, allocate at least 4 routing layers for the BGA break-out region and use a via-in-pad approach with filled and plated-over vias for the inner-row balls to maximize escape routing channels.
At full 500 MHz CPU load with both Ethernet MACs active, the ATSAMA5D26A-CN typically dissipates 1.5-2 W, requiring thermal management for industrial temperature operation. The LFBGA package has a junction-to-ambient thermal resistance (theta_JA) of approximately 25 C/W on a 4-layer JEDEC test board; for -40C to +85C ambient operation, provide a minimum 4 square inches of top-layer copper ground pour connected to the thermal balls.
Do not connect the DDR reference voltage (DDR_VREF) directly to a resistive divider from VDDCORE - use a dedicated low-noise LDO regulator with at least 10 mA capacity. The Cortex-A5 core requires precise power sequencing: VDDCORE must reach 1.1 V before VDDBU (backup) and VDDIODDR. Violating this sequence can cause permanent latch-up damage to the internal logic.
合規資訊
RoHS and REACH compliant per Microchip product declaration. Not AEC-Q100 qualified - for automotive safety applications, consider ATSAMA5D27A-CU which offers extended qualification.