ATSAMD20J18A-AU - ARM Cortex-M0+ MCU, 256KB Flash | Microchip
MPN： ATSAMD20J18A-AU ✓ 啟用中ATSAMD20J18A-AU 概覽
An ARM Cortex-M0+ microcontroller is a 32-bit processor core implementing the ARMv6-M architecture (Thumb/Thumb-2 instruction set), optimized for energy-efficient embedded computing. Cortex-M0+ sits at the low-power end of the Cortex-M family above M0L/M23 and below M3/M4/M7, and integrates tightly with on-chip flash, SRAM, and peripherals to form a system-on-chip (SoC) within the broader microcontroller and embedded processing hierarchy.
Key features include a 12-bit ADC up to 200 ksps, 10-bit DAC, up to 8 SERCOM interfaces that can each be configured as UART, SPI, I2C, or LIN, a 24-bit timer/counter, RTC, full-speed USB device, and 2.4mA/MHz active current with multiple Sleep, Standby, and Backup sleep modes that drop consumption into the microamp range. Six SERCOM channels, six timer/counters, and an I2S interface provide flexible connectivity for sensors, displays, and communications.
Technically, the device integrates a single-cycle multiplier, 4KB cache, and a 2-channel DMA engine for low-overhead peripheral transfers. The architecture is well documented in the SAM D20 family datasheet and is supported by Microchip's MPLAB X IDE, ASF, and Atmel Studio 7 toolchains, with a choice of GCC or IAR compilers. A built-in 32.768 kHz oscillator and an on-chip PLL simplify clocking for USB and high-speed peripherals.
Typical applications include home-automation gateways, smart energy metering, industrial sensor nodes, consumer HMI controls, low-power wireless sensor nodes, and USB human-interface devices. The wide 1.62V to 3.6V supply range and ultra-low-power Sleep modes also support battery-powered IoT endpoints.
When designing with this device, ensure that the decoupling network (typically 100nF plus 4.7uF bulk) is placed within a few millimeters of the VDD pins, and that PA24/PA25 (USB) and PA22/PA23 are configured correctly for full-speed USB if the D+ pull-up is needed. Pay attention to the SERCOM pin-mux table: each SERCOM can be mapped to several I/O pins, but only one mapping at a time is active.
This page synthesizes distributor pricing, drop-in same-family alternatives, and practical design notes that are not always assembled in a single location elsewhere.
直接替換替代品，適用於 ATSAMD20J18A-AU — 相同封裝，腳位對腳位相容。需重新設計 PCB 的不同封裝零件不列入。
此系列的變體
與下列產品可直接替換的同系列型號： ATSAMD20J18A-AU （相同外形與佔位） — 差異在於 ADC, Package, USB, SRAM, DAC.
ATSAMD20J17A-AU
✅ 直接替換聯絡詢價
查看資料表 →ATSAMD20J16B-AN
✅ 直接替換聯絡詢價
查看資料表 →ATSAMD20J15A-AUT
✅ 直接替換聯絡詢價
查看資料表 →ATSAMD20J18A-AUT
✅ 直接替換聯絡詢價
查看資料表 →ATSAMD20E18A-AU
✅ 直接替換聯絡詢價
查看資料表 →ATSAMD21J18A-AFT
✅ 直接替換聯絡詢價
查看資料表 →ATSAMD20J18A-AU 最大額定值與電氣特性
| Core | ARM Cortex-M0+ (ARMv6-M, 32-bit) |
| 最大時脈頻率 | 48 MHz |
| Flash Memory | 256 KB |
| SRAM | 32 KB |
| Operating Voltage Range | 1.62 V to 3.6 V |
| 封裝 | 64-LQFP (10x10 mm) |
| Programmable I/O Pins | Up to 52 |
| ADC | 12-bit, up to 200 ksps |
| DAC | 10-bit |
| SERCOM Interfaces | Up to 8 (UART/SPI/I2C/LIN configurable) |
| USB | Full-Speed USB 2.0 Device |
| Timer/Counters | Six 16-bit TC, one 24-bit TC, one 32-bit RTC |
| DMA Channels | 2 (with 12 channels) |
| 工作溫度範圍 | -40 C to +85 C |
| 安裝類型 | Surface Mount (LQFP) |
| MSL 等級 | 3 |
| RoHS 狀態 | Compliant |
ATSAMD20J18A-AU 腳位配置
| 腳位 1 | PA00 — I/O / ADC AIN0 |
| 腳位 2 | PA01 — I/O / ADC AIN1 |
| 腳位 3 | PA02 — I/O / ADC AIN2 |
| 腳位 4 | PA03 — I/O / ADC AIN3 / VREFA |
| 腳位 5 | GND — Ground |
| 腳位 6 | PA04 — I/O / ADC AIN4 |
| 腳位 7 | PA05 — I/O / ADC AIN5 |
| 腳位 8 | PA06 — I/O / ADC AIN6 |
| 腳位 9 | PA07 — I/O / ADC AIN7 |
| 腳位 10 | VDDIO — Digital I/O supply |
| 腳位 11 | GND — Ground |
| 腳位 12 | VDDIN — Main voltage regulator input |
| 腳位 13 | VDDOUT — Internal LDO output (decouple 1uF) |
| 腳位 14 | VDDANA — Analog supply |
| 腳位 15 | GND — Ground |
| 腳位 16 | PA08 — I/O / ADC AIN8 / SERCOM pad |
| 腳位 17 | PA09 — I/O / ADC AIN9 / SERCOM pad |
| 腳位 18 | PA10 — I/O / ADC AIN10 / SERCOM pad |
| 腳位 19 | PA11 — I/O / ADC AIN11 / SERCOM pad |
| 腳位 20 | PA12 — I/O / SERCOM pad |
| 腳位 21 | PA13 — I/O / SERCOM pad |
| 腳位 22 | PA14 — I/O / SERCOM pad |
| 腳位 23 | PA15 — I/O / SERCOM pad |
| 腳位 24 | PA16 — I/O / SERCOM pad |
| 腳位 25 | PA17 — I/O / SERCOM pad |
| 腳位 26 | PA18 — I/O / SERCOM pad |
| 腳位 27 | PA19 — I/O / SERCOM pad |
| 腳位 28 | PA20 — I/O / SERCOM pad |
| 腳位 29 | PA21 — I/O / SERCOM pad |
| 腳位 30 | PA22 — I/O / SERCOM pad |
| 腳位 31 | PA23 — I/O / SERCOM pad |
| 腳位 32 | PA24 — USB D- (or GPIO) |
| 腳位 33 | PA25 — USB D+ (or GPIO) |
| 腳位 34 | GND — Ground |
| 腳位 35 | PA26 — I/O |
| 腳位 36 | PA27 — I/O |
| 腳位 37 | PA28 — I/O / Reset pin |
| 腳位 38 | GND — Ground |
| 腳位 39 | VDDIO — Digital I/O supply |
| 腳位 40 | PA30 — SWDIO (debug) |
| 腳位 41 | PA31 — SWCLK (debug) |
| 腳位 42 | PB00 — I/O |
| 腳位 43 | PB01 — I/O |
| 腳位 44 | PB02 — I/O / ADC AIN14 |
| 腳位 45 | PB03 — I/O / ADC AIN15 |
| 腳位 46 | PB04 — I/O / ADC AIN12 |
| 腳位 47 | PB05 — I/O / ADC AIN13 |
| 腳位 48 | PB06 — I/O |
| 腳位 49 | PB07 — I/O |
| 腳位 50 | PB08 — I/O |
| 腳位 51 | PB09 — I/O |
| 腳位 52 | PB10 — I/O |
| 腳位 53 | PB11 — I/O |
| 腳位 54 | PB12 — I/O |
| 腳位 55 | PB13 — I/O |
| 腳位 56 | PB14 — I/O |
| 腳位 57 | PB15 — I/O |
| 腳位 58 | PB16 — I/O |
| 腳位 59 | PB17 — I/O |
| 腳位 60 | PA07 — I/O (alternate) |
| 腳位 61 | XIN32 — 32.768 kHz crystal input |
| 腳位 62 | XOUT32 — 32.768 kHz crystal output |
| 腳位 63 | GND — Ground |
| 腳位 64 | VDDANA — Analog supply (or decoupling) |
典型應用
ATSAMD20J18A-AU 適用於 6 應用s: Home Automation Gateway, Smart Energy Metering, Industrial Sensor Node, Consumer HMI Controller, USB HID / HID-Class Peripheral, Battery-Powered IoT Endpoint.
Home Automation Gateway
The ATSAMD20J18A-AU is well-suited as a home-automation gateway controller because its 256 KB flash fits Z-Stack or a custom RF protocol image, while the 1.62 V to 3.6 V supply range accepts direct coin-cell or 3.3 V regulated rails. With up to eight SERCOM interfaces (each configurable as UART/SPI/I2C), a designer can connect to Wi-Fi modules, BLE SoCs, Zigbee radios, and a sensor I2C bus simultaneously. The Cortex-M0+ at 48 MHz and 32 KB SRAM handle packet routing, sensor aggregation, and OTA update staging. Sleep currents below 10 uA in Standby mode keep quiescent power negligible when the gateway is idle. Drop the same footprint pin-compatible ATSAMD21J18A-AFT in if USB Host support becomes a requirement.
推薦
Smart Energy Metering
In smart energy meters, the ATSAMD20J18A-AU's 12-bit ADC up to 200 ksps samples current and voltage with adequate resolution for IEC 62053-21 class-1 accuracy, while the 10-bit DAC and op-amp outputs drive calibration and signal conditioning. The 32 KB SRAM buffers measurement frames, and the 256 KB flash holds metering firmware plus optional DLMS/COSEM or Modbus stacks. Real-time clock with calendar and 32.768 kHz crystal support enable accurate time-stamping for billing periods. Wide 1.62 V to 3.6 V operation allows the device to run directly from a 3.3 V LDO fed by the meter's auxiliary supply. Low-power Standby mode helps meet idle power targets under 0.5 W typical.
推薦
Industrial Sensor Node
For industrial 4 mA to 20 mA or 0 V to 10 V sensor nodes, the ATSAMD20J18A-AU's 12-bit ADC, six 16-bit timers, and DMA engine reduce CPU load when sampling at high rates or driving PWM outputs for valve control. Operating temperature of -40 C to +85 C supports cabinet-mounted applications, and the wide 1.62 V to 3.6 V supply allows operation from 24 V industrial rails via a small buck regulator. The Cortex-M0+ plus 256 KB flash accommodates IEC 61131-3 style function blocks or simple ladder logic. EMC is improved by the on-chip 32 kHz and 8 MHz RC oscillators plus optional PLL, reducing external clock noise. Choose the ATSAMD21J18A-AFT sibling if CAN connectivity is added.
推薦
Consumer HMI Controller
The ATSAMD20J18A-AU can drive small TFT displays and capacitive touch interfaces through SPI or I2C, with up to 52 programmable I/O pins available to scan keypads, read rotary encoders, and pulse indicator LEDs. The eight SERCOMs allow simultaneous connection to a Wi-Fi/BLE combo module, a graphic display, and an audio codec via I2S on the SAMD21 family sibling. 256 KB flash holds graphics libraries, fonts, and OTA-capable firmware. The 12-bit ADC and 10-bit DAC simplify audio cue generation and backlight control via PWM. Pin compatibility with the SAM D21J family eases upgrades if USB Host or more peripherals are needed.
推薦
USB HID / HID-Class Peripheral
The ATSAMD20J18A-AU integrates a full-speed USB 2.0 device controller with on-chip pull-up and 48 MHz clock domain, enabling HID-class peripherals such as keyboards, mice, game controllers, and custom input devices without an external PHY. The 256 KB flash and 32 KB SRAM fit USB stacks plus HID report descriptors, while the Cortex-M0+ runs composite USB stacks comfortably. The 64-LQFP footprint exposes up to 52 I/O pins for switches, encoders, LEDs, and analog inputs. Low-power Sleep and Standby modes reduce suspend current below 2.5 mA per USB specifications. Use the SERCOMs to attach I2C sensors that report through HID vendor interfaces.
推薦
Battery-Powered IoT Endpoint
For coin-cell or AA-battery endpoints, the ATSAMD20J18A-AU's Standby current below 10 uA and Backup mode with RTC wake-up extend battery life into years. The 1.62 V to 3.6 V supply range is ideal for 2x alkaline or 1x Li-ion chemistries, and the integrated 8 MHz and 32.768 kHz oscillators remove external crystals for low-power wake-timer use. The 256 KB flash fits LoRaWAN or BLE 5 application code and device certificates, and the Cortex-M0+ at 48 MHz plus DMA offload radio packet processing efficiently. With up to eight SERCOMs, designers can attach multiple sensors or an SPI radio with interrupt-driven wake. Pin compatibility with SAMD20J17A-AU/SAMD20J16B-AN allows cost-down without layout changes.
推薦
推薦產品摘要
工程參考資料，適用於 ATSAMD20J18A-AU — 比較、設計指引及合規資訊。
選型指南
與替代品比較
| 參數 | 本產品 | ATSAMD20J17A-AU | ATSAMD20J16B-AN | ATSAMD20J15A-AUT | ATSAMD20E18A-AU | ATSAMD21J18A-AFT |
|---|---|---|---|---|---|---|
| Package | 64-LQFP (10x10 mm) | 64-LQFP (10x10 mm) - same | 64-LQFP (10x10 mm) - same | 64-LQFP (10x10 mm) - same | 64-LQFP (10x10 mm) - same | 64-TQFP - same footprint family |
| Brand | Microchip Technology | Microchip Technology - same | Microchip Technology - same | Microchip Technology - same | Microchip Technology - same | Microchip Technology - same |
| Core | ARM Cortex-M0+ 48 MHz | ARM Cortex-M0+ 48 MHz - same | ARM Cortex-M0+ 48 MHz - same | ARM Cortex-M0+ 48 MHz - same | ARM Cortex-M0+ 48 MHz - same | ARM Cortex-M0+ 48 MHz - same |
| Flash | 256 KB | 128 KB (-50%) | 64 KB (-75%) | 32 KB (-87.5%) | 256 KB (same) | 256 KB (same) |
| SRAM | 32 KB | 16 KB (-50%) | 8 KB (-75%) | 4 KB (-87.5%) | 32 KB (same) | 32 KB (same) |
| Operating Voltage | 1.62 V to 3.6 V | 1.62 V to 3.6 V - same | 1.62 V to 3.6 V - same | 1.62 V to 3.6 V - same | 1.62 V to 3.6 V - same | 1.62 V to 3.6 V - same |
| USB | Full-Speed USB Device | Full-Speed USB Device - same | Full-Speed USB Device - same | Full-Speed USB Device - same | Full-Speed USB Device - same | Full-Speed USB Host + Device |
| SERCOMs | 8 | 8 - same | 8 - same | 8 - same | 8 - same | 8 - same |
| I/O Pins | Up to 52 | Up to 52 - same | Up to 52 - same | Up to 52 - same | Up to 52 - same | Up to 52 - same |
| ADC | 12-bit, 200 ksps | 12-bit, 200 ksps - same | 12-bit, 200 ksps - same | 12-bit, 200 ksps - same | 12-bit, 200 ksps - same | 12-bit, 200 ksps - same |
| Operating Temperature | -40 C to +85 C | -40 C to +85 C - same | -40 C to +85 C - same | -40 C to +85 C - same | -40 C to +85 C - same | -40 C to +85 C - same |
| Approx. Unit Price (qty 1, USD, as of 2026-09-21) | 3.55 | 3.05 | 2.65 | 2.30 | 3.40 | 4.10 |
主要差異化特點
- Largest flash in the SAM D20J family (對比ATSAMD20J17A-AU)
- Larger memory with full peripheral set vs SAMD21 upgrade (對比ATSAMD21J18A-AFT)
- More I/O and peripherals than SAM D20E and D20G variants (對比ATSAMD20E18A-AU)
設計說明
Decoupling: place one 100 nF X7R ceramic within 2 mm of each VDD pin and one 4.7 uF ceramic close to VDDIN/VDDANA. VDDOUT requires a 1 uF decoupling cap per the SAM D20 family datasheet to stabilize the internal LDO. A ferrite bead between VDDIN and VDDANA reduces analog-domain switching noise. Estimated worst-case active current is 2.4 mA/MHz at 48 MHz, so peak I_DD is roughly 115 mA; choose a regulator rated 200 mA+ for margin.
Crystal layout: route the 32.768 kHz crystal traces symmetrically within a guarded ground pour and keep them short (under 5 mm) to reduce stray capacitance. The USB DP/DM pair (PA24/PA25) must be routed as a 90 ohm differential pair with no stubs and a continuous ground reference for full-speed USB compliance. The exposed thermal pad of LQFP is not present on this package, but PCB thermal relief for the GND pins should follow the SAM D20 datasheet.
SERCOM pin multiplexing: each SERCOM can be mapped to multiple I/O pads, but only one mapping is active at a time - misconfiguring PMUX bits is a common cause of UART/SPI failure. The reset pin (PA28) is shared with the SERCOM and must be configured as GPIO before the firmware disables the reset function. For USB, leave the internal pull-up enabled only when VBUS is present; floating DP/DM lines can cause phantom USB enumeration. Estimated: firmware upload via SWD requires the PA30/PA31 SWDIO/SWCLK pins not be repurposed without a programmer override.
At 48 MHz and typical 2.4 mA/MHz active current per the SAM D20 family datasheet, the LQFP-64 thermal resistance (theta_JA) is approximately 50 C/W on a 4-layer JEDEC PCB, allowing roughly 2 W continuous dissipation. In Standby with RTC wake, current drops below 10 uA and self-heating is negligible. For industrial designs, derate by 25% at +85 C ambient.
合規資訊
RoHS and REACH compliance per Microchip product page. Not AEC-Q100 qualified; for AEC-Q100 use ATSAMC20J18A-MUT (automotive grade).
