BQ4845S-A4 - Parallel RTC with CPU Supervisor | Texas Instruments
MPN： BQ4845S-A4 ✓ 啟用中BQ4845S-A4 概覽
A real-time clock is a timekeeping peripheral that maintains calendar information independently of the system processor. The BQ4845S-A4 combines a low-power RTC with a CPU supervisor, allowing a system to detect power faults, monitor operating intervals, receive reset signaling, and preserve external SRAM contents during primary-power loss. This integration reduces the number of discrete supervisory components required in embedded equipment.
The device provides an on-chip battery-backup switchover circuit and nonvolatile control for external SRAM through the conditional chip enable output, CEOUT, and battery voltage output, VOUT. Its backup clock current is less than 500 nA, while the parallel interface and BCD calendar support microprocessor-based timekeeping. The 28-SOIC package is designed for conventional surface-mount assembly, and the verified distributor listing identifies a 7.50 mm-wide, 0.295-inch body.
The BQ4845S-A4 is suitable when the system requires more than a basic clock. Its watchdog timer can initiate reset or interrupt behavior when software stops responding, while the CPU supervisor provides power-monitoring signals during startup and shutdown. Backup support can maintain RTC operation and external SRAM information when the system supply is absent, assuming the backup battery remains within the manufacturer-specified operating limits.
Typical designs place the RTC beside the processor and nonvolatile SRAM, connect a 32.768 kHz crystal to the oscillator inputs, and route CEOUT and VOUT to the memory-control interface. The parallel bus simplifies firmware access to time and calendar registers. Designers should follow the manufacturer datasheet for crystal load capacitance, decoupling, signal timing, reset polarity, and battery connection details.
This page combines verified manufacturer and distributor information with engineering guidance for RTC integration, power-fail control, watchdog validation, and PCB layout. The available data does not provide a current unit-price table, so pricing fields are not fabricated here. Verify distributor availability and lifecycle status before committing a production design.
直接替換替代品，適用於 BQ4845S-A4 — 相同封裝，腳位對腳位相容。需重新設計 PCB 的不同封裝零件不列入。
此系列的變體
與下列產品可直接替換的同系列型號： BQ4845S-A4 （相同外形與佔位） — 差異在於 Package, Product Type, Backup Battery, Battery Voltage Output.
BQ4845S-A4NTRG4
✅ 直接替換聯絡詢價
查看資料表 →BQ4845YS-A4NTRG4
✅ 直接替換📋 參考替代品（不在目錄中）
BQ4845YS-A4NTR
✅ 直接替換聯絡詢價
查看資料表 →BQ4845S-A4 規格
| Product Type | Parallel real-time clock with CPU supervisor |
| Timekeeping Format | BCD, seconds through years |
| Crystal Frequency | 32.768 kHz |
| Backup Battery | 3 V |
| Backup Clock Current | Less than 500 nA |
| 介面 | Parallel |
| Integrated Functions | RTC, CPU supervisor, watchdog timer, reset, interrupts, battery-low warning |
| Nonvolatile SRAM Control | External SRAM write protection and switchover control |
| Battery-Backup Switchover | On-chip |
| CEOUT Function | Conditional chip enable output |
| VOUT Function | Battery voltage output |
| 封裝 | 28-pin SOIC |
| Package Body Width | 7.50 mm |
| Package Length | 0.295 inch |
| 安裝類型 | Surface mount |
| Application Categories | Industrial control systems, point-of-sale terminals, data loggers, computers, fax machines, copiers |
BQ4845S-A4 0.295 inch 腳位配置指南
BQ4845S-A4（0.295 inch 封裝）的腳位配置。 腳位編號、功能與連接圖定義於製造商資料手冊中。請參閱該手冊以取得確切的封裝尺寸與焊接指引。
無詳細腳位定義資料： BQ4845S-A4.
請參閱 資料表 以查看完整腳位配置。
典型應用
BQ4845S-A4 適用於 6 應用s: Industrial Control Systems, Point-of-Sale Terminals, Data Loggers, Fax Machines and Copiers, Computer Peripheral Equipment, Battery-Powered Embedded Equipment.
Industrial Control Systems
The BQ4845S-A4 fits industrial controllers that need persistent calendar time and supervised processor power. It combines a 32.768 kHz crystal interface with BCD time and calendar registers, while its CPU supervisor and reset functions help the controller respond to power faults. The 3 V backup path and external-SRAM control features can preserve system state when the main rail fails. Compared with a basic software timestamp, the integrated RTC continues timing independently of the processor. Designers should verify supervisor thresholds, reset polarity, bus timing, and crystal loading in the TI datasheet.
推薦
Point-of-Sale Terminals
A point-of-sale terminal can use the BQ4845S-A4 to maintain transaction time through power interruptions and system resets. The parallel interface provides direct access to seconds, calendar, and alarm information, while the watchdog and CPU-supervisor functions support recovery from a stalled controller. External SRAM can be write-protected through CEOUT during power transitions, helping protect transaction records when VOUT reports backup-battery status. The part is appropriate when the design values reliable timestamps more than a minimal RTC-only solution.
推薦
Data Loggers
The BQ4845S-A4 is useful in data loggers that must timestamp measurements during normal operation and after short power interruptions. Its low-power backup clock current of less than 500 nA helps preserve RTC operation, while the 3 V backup-battery connection supports continued calendar tracking. CEOUT and VOUT can coordinate write protection for external SRAM, reducing the risk of corrupting buffered records during a power failure. Firmware should use the watchdog and reset outputs to mark interrupted logging sessions and synchronize newly collected data.
推薦
Fax Machines and Copiers
The BQ4845S-A4 can provide time and calendar functions in office equipment that must retain operational timing across power cycles. The integrated CPU supervisor and reset functions are useful for system initialization after brownout or supply interruption, while the watchdog helps recover embedded firmware that stops responding. The parallel RTC architecture and external-SRAM control make the device relevant to older control boards with processor-managed memory. Designers should confirm logic-level compatibility, bus timing, backup-battery chemistry, and package footprint against the original design.
推薦
Computer Peripheral Equipment
The BQ4845S-A4 suits computer peripherals that need an independent time base, power-fail detection, and controlled reset behavior. A 32.768 kHz crystal supports conventional RTC operation, and the backup battery can maintain timekeeping while the system is unpowered. CEOUT and VOUT allow an external SRAM to be protected before its contents become uncertain during supply loss. In a new design, the RTC should be placed close to the crystal and backup source, with careful routing of reset and supervisory signals to prevent false trip events.
推薦
Battery-Powered Embedded Equipment
The BQ4845S-A4 can support portable or intermittently powered equipment that must retain real-time information between active operating periods. The verified backup-current value of less than 500 nA is relevant to battery-life calculations, although actual consumption depends on battery voltage, leakage, temperature, and the selected crystal and external components. The CPU supervisor provides a hardware basis for orderly shutdown or restart, and the RTC preserves time independently of the main processor. Engineers should validate the full power budget rather than treating the clock-current specification as the complete system standby current.
推薦
推薦產品摘要
工程參考資料，適用於 BQ4845S-A4 — 比較、設計指引及合規資訊。
選型指南
與替代品比較
| 參數 | 本產品 | BQ4845S-A4NTRG4 | BQ4845YS-A4NTRG4 | BQ4845YS-A4NTR |
|---|---|---|---|---|
| Package | 28-SOIC | 28-SOIC | 28-SOIC | 28-SOIC |
| Brand | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments |
主要差異化特點
- Integrated RTC and CPU supervision (對比BQ4845YS-A4NTRG4)
- External SRAM retention support (對比BQ4845S-A4NTRG4)
- Low-power backup operation (對比BQ4845YS-A4NTR)
設計說明
Route the 32.768 kHz crystal connections as short as possible and keep the oscillator loop away from switching nodes, high-current rails, and the parallel bus. Preserve the manufacturer-recommended ground and decoupling layout around the RTC, backup battery, and supervisor inputs. Crystal placement, grounding, and shielding are especially important because the RTC’s timing accuracy depends on oscillator noise and load conditions.
Design the power-fail path around the verified CEOUT and VOUT functions and ensure the backup battery is isolated from the primary rail as specified by the manufacturer. Confirm that the external SRAM receives write protection before its supply becomes indeterminate. Validate startup, brownout, and battery-only behavior with the actual supply ramps and load currents rather than relying only on nominal voltage values.
Do not infer pin compatibility from the BQ4845 family name or from a distributor cross-reference result alone. Compare the complete pinout, parallel-bus timing, reset polarity, watchdog limits, supervisor thresholds, battery handling, and package dimensions against the TI datasheet. The supplied data identifies related variants, but it does not quantify every electrical difference, so production substitution requires a documented engineering review.
合規資訊
Compliance information was not present in the supplied verified web data. Confirm RoHS, REACH, AEC-Q100, lead-free, halogen-free, and conflict-minerals status using the current manufacturer product documentation or supplier declaration.