CY90F387SPMCR-G-JNE1 - 16-bit F²MC-16LX MCU 64KB Flash 48-LQFP | Infineon
MPN： CY90F387SPMCR-G-JNE1 ✓ 啟用中CY90F387SPMCR-G-JNE1 概覽
A 16-bit MCU (microcontroller unit) is a single-chip processor that integrates a CPU core, program and data memory, on-chip peripherals, and interrupt control into one IC. The F²MC-16LX architecture is the second-generation F²MC family whose Harvard-style core, multi-stage pipeline, and rich peripheral set make it well-suited to real-time control. Within the broader semiconductor hierarchy, the F²MC-16LX belongs to microcontrollers, which sit under the larger umbrella of embedded processors and integrated circuits. The MB90385 sub-series adds a built-in full-CAN interface, which is essential for in-vehicle networking such as CAN 2.0A/B body and chassis domains.
Key features of the CY90F387SPMCR-G-JNE1 include 64 KB of Flash, 2 KB of on-chip RAM (typical for the MB90385 series), a 16 MHz maximum operating frequency, a 10-bit successive-approximation A/D converter with multiple channels, a 16-bit reload timer, a 16-bit free-run timer, UART and SIO channels, an external interrupt controller, and a full-CAN controller. The 48-LQFP (7x7 mm) package provides a thin, leaded, surface-mountable footprint that is widely accepted in automotive ECUs and industrial control boards.
The MB90385 architecture features an enhanced 16-bit F²MC core with a 4-byte instruction queue, hardware multiplier, and 16 MB linear address space. Its built-in full-CAN module implements the CAN 2.0A/B active/passive error states with 16 message buffers, supporting baud rates from 125 kbps up to 1 Mbps, which is critical for body, chassis, and powertrain CAN networks. The on-chip flash supports both hardware and software protection against accidental writes, an important feature for safety-critical in-vehicle firmware.
Typical applications include automotive body control modules (BCM), instrument clusters, HVAC climate controllers, steering-angle sensor interfaces, immobilizers, generic CAN node endpoints, and industrial process-control boards that require a CAN link plus a moderate Flash budget. The 64 KB Flash is sufficient for small to medium protocol stacks, sensor-fusion routines, and motor-control state machines.
When designing with this part, ensure that the brown-out detection threshold and the PLL/clock-divider configuration match the system clock budget. Add a 4.7 kΩ pullup on the CAN RX line and a 120 Ω split termination on the bus. Decouple VCC/VSS pairs with 100 nF ceramic capacitors placed within 5 mm of the pins.
This page synthesizes distributor pricing, drop-in alternatives, comparison data, and practical design notes not consolidated in the manufacturer datasheet alone.
直接替換替代品，適用於 CY90F387SPMCR-G-JNE1 — 相同封裝，腳位對腳位相容。需重新設計 PCB 的不同封裝零件不列入。
CY90F387SPMCR-GS-UJE1
✅ 直接替換📋 參考替代品（不在目錄中）
CY90F387SPMCR-GSE1
✅ 直接替換📋 參考替代品（不在目錄中）
CY90F387SPMT-G-JNE1
✅ 直接替換📋 參考替代品（不在目錄中）
CY90F387SPMT-G-N9E1
✅ 直接替換📋 參考替代品（不在目錄中）
MB90497GPMC-GS-258E1
✅ 直接替換📋 參考替代品（不在目錄中）
CY90F387SPMCR-G-JNE1 最大額定值與電氣特性
| Core Architecture | F²MC-16LX (MB90385 series) |
| Core Bit Width | 16-bit |
| 最大時脈頻率 | 16 MHz |
| Program Memory Type | Flash |
| Program Memory Size | 64 KB (64K x 8) |
| 工作溫度範圍 | -40 °C to +105 °C (automotive grade) |
| 封裝 | 48-LQFP (7x7 mm) |
| 安裝類型 | Surface Mount |
| A/D Converter | 10-bit successive-approximation, multi-channel |
| Timers | 16-bit reload timer, 16-bit free-run timer |
| Communication Interfaces | UART, SIO, full-CAN (CAN 2.0A/B) |
| External Interrupts | Yes, multiple channels |
| RoHS 狀態 | Compliant |
CY90F387SPMCR-G-JNE1 腳位配置
| 腳位 1 | VCC — Digital supply voltage (5 V) |
| 腳位 2 | P00/AN0 — Port 0 bit 0 / A/D channel 0 |
| 腳位 3 | P01/AN1 — Port 0 bit 1 / A/D channel 1 |
| 腳位 4 | P02/AN2 — Port 0 bit 2 / A/D channel 2 |
| 腳位 5 | P03/AN3 — Port 0 bit 3 / A/D channel 3 |
| 腳位 6 | P04/AN4 — Port 0 bit 4 / A/D channel 4 |
| 腳位 7 | P05/AN5 — Port 0 bit 5 / A/D channel 5 |
| 腳位 8 | P06/AN6 — Port 0 bit 6 / A/D channel 6 |
| 腳位 9 | P07/AN7 — Port 0 bit 7 / A/D channel 7 |
| 腳位 10 | VSS — Ground reference |
| 腳位 11 | P10 — Port 1 bit 0 (digital I/O) |
| 腳位 12 | P11 — Port 1 bit 1 (digital I/O) |
| 腳位 13 | P12 — Port 1 bit 2 (digital I/O) |
| 腳位 14 | P13 — Port 1 bit 3 (digital I/O) |
| 腳位 15 | P14 — Port 1 bit 4 (digital I/O) |
| 腳位 16 | P15 — Port 1 bit 5 (digital I/O) |
| 腳位 17 | P16 — Port 1 bit 6 (digital I/O) |
| 腳位 18 | P17 — Port 1 bit 7 (digital I/O) |
| 腳位 19 | VSS — Ground reference |
| 腳位 20 | VCC — Digital supply voltage (5 V) |
| 腳位 21 | P20/INT0 — Port 2 bit 0 / External interrupt 0 |
| 腳位 22 | P21/INT1 — Port 2 bit 1 / External interrupt 1 |
| 腳位 23 | P22/INT2 — Port 2 bit 2 / External interrupt 2 |
| 腳位 24 | P23 — Port 2 bit 3 (digital I/O) |
| 腳位 25 | MD0 — Mode select pin 0 (operating mode) |
| 腳位 26 | MD1 — Mode select pin 1 (operating mode) |
| 腳位 27 | X0 — Main oscillator input |
| 腳位 28 | X1 — Main oscillator output |
| 腳位 29 | RST — Reset input (active low) |
| 腳位 30 | VPP — Flash programming voltage |
| 腳位 31 | P30/RXD0 — Port 3 bit 0 / UART0 receive |
| 腳位 32 | P31/TXD0 — Port 3 bit 1 / UART0 transmit |
| 腳位 33 | P32/SCLK0 — Port 3 bit 2 / SIO0 clock |
| 腳位 34 | P33/SDA0 — Port 3 bit 3 / SIO0 data |
| 腳位 35 | P34/TIN1 — Port 3 bit 4 / Timer 1 input |
| 腳位 36 | P35/TOUT1 — Port 3 bit 5 / Timer 1 output |
| 腳位 37 | P36 — Port 3 bit 6 (digital I/O) |
| 腳位 38 | P37 — Port 3 bit 7 (digital I/O) |
| 腳位 39 | P40/TOUT0 — Port 4 bit 0 / Timer 0 output |
| 腳位 40 | P41/TIN0 — Port 4 bit 1 / Timer 0 input |
| 腳位 41 | P42 — Port 4 bit 2 (digital I/O) |
| 腳位 42 | CAN_TX — CAN bus transmit output |
| 腳位 43 | CAN_RX — CAN bus receive input |
| 腳位 44 | P50 — Port 5 bit 0 (digital I/O) |
| 腳位 45 | P51 — Port 5 bit 1 (digital I/O) |
| 腳位 46 | VSS — Ground reference |
| 腳位 47 | VCC — Digital supply voltage (5 V) |
| 腳位 48 | AVCC — Analog supply voltage (5 V) for A/D converter |
典型應用
CY90F387SPMCR-G-JNE1 適用於 6 應用s: Automotive Body Control Module (BCM), Automotive HVAC Climate Controller, Instrument Cluster Slave Node, Immobilizer and Key-Fob Reader Node, Industrial Process-Control CAN Node, Steering Angle Sensor Interface.
Automotive Body Control Module (BCM)
The CY90F387SPMCR-G-JNE1's 16-bit F²MC-16LX core, 64 KB Flash, and on-chip full-CAN 2.0A/B controller map directly to the BCM role of polling door/window/lamp nodes at typical 125 kbps to 500 kbps. Its 48-LQFP 7x7 mm package is standard for dashboard-mounted BCM PCBs. With 16 MHz clock the core delivers ~8 MIPS, sufficient for LIN/CAN gateway code plus PWM lamp drivers, while the 10-bit A/D handles battery-voltage and switch-input sensing at >1 kHz without saturating the FPGA.
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Automotive HVAC Climate Controller
An HVAC controller must run a closed-loop PID over cabin and duct temperatures while driving a CAN link to the dashboard. The CY90F387SPMCR-G-JNE1's 10-bit multi-channel A/D samples thermistor bridges at better than 0.5 °C resolution, and its two 16-bit timers drive PWM blower speeds. The on-chip full-CAN controller offloads message arbitration from the core, so the 16-bit CPU can focus on the control loop. The 48-LQFP package keeps the BOM compact inside a dashboard HVAC module.
推薦
Instrument Cluster Slave Node
In a distributed instrument-cluster architecture the CY90F387SPMCR-G-JNE1 acts as a CAN-attached slave that drives tell-tale LEDs, gauges, and buzzer feedback. Its 16-bit F²MC-16LX core plus 64 KB Flash handles gauge-stepper control tables and ISO 15765 diagnostics, while its timers generate the PWM dimming curve. The wide -40 °C to +105 °C operating range supports under-dash mounting where temperatures swing with engine soak.
推薦
Immobilizer and Key-Fob Reader Node
The CY90F387SPMCR-G-JNE1 suits a steering-column immobilizer reader where it polls an LF/RF key-fob transponder via SPI/UART and authenticates over CAN to the BCM. The 64 KB Flash holds the rolling-code algorithm and the OEM challenge-response table, while the on-chip A/D samples the inductive antenna tuning. The 48-LQFP 7x7 mm footprint fits inside the column-mounted reader module without an additional FPGA.
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Industrial Process-Control CAN Node
On a factory floor, the CY90F387SPMCR-G-JNE1 can serve as a CANOpen or DeviceNet slave node driving digital I/O and reading 4 mA to 20 mA loops via the on-chip 10-bit A/D. The 16-bit F²MC-16LX core runs PDO/SDO mapping, and 64 KB Flash holds the CANOpen object dictionary. Its wide supply range (3.0 V to 5.5 V) lets the same part power 24 V-bus isolated nodes with a small local regulator.
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Steering Angle Sensor Interface
A steering-angle sensor module reads an angular encoder and publishes the value to the EPS ECU. The CY90F387SPMCR-G-JNE1 captures the encoder counter via its 16-bit free-run timer, runs safety plausibility checks, and broadcasts over full-CAN at 500 kbps. The 16 MHz CPU and 64 KB Flash leave headroom for ISO 26262-style diagnostics. The 48-LQFP footprint and -40 °C to +105 °C grade meet under-column thermal requirements.
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推薦產品摘要
工程參考資料，適用於 CY90F387SPMCR-G-JNE1 — 比較、設計指引及合規資訊。
選型指南
與替代品比較
| 參數 | 本產品 | CY90F387SPMCR-GS-UJE1 | CY90F387SPMCR-GSE1 | CY90F387SPMT-G-JNE1 | CY90F387SPMT-G-N9E1 | MB90497GPMC-GS-258E1 |
|---|---|---|---|---|---|---|
| Brand | Infineon | Infineon | Infineon | Infineon | Infineon | Infineon |
| Package | 48-LQFP (7x7 mm) | 48-LQFP (7x7 mm) - same | 48-LQFP (7x7 mm) - same | 48-LQFP (7x7 mm) - same | 48-LQFP (7x7 mm) - same | 48-LQFP (7x7 mm) - same |
| Core Architecture | F²MC-16LX (16-bit) | F²MC-16LX (16-bit) | F²MC-16LX (16-bit) | F²MC-16LX (16-bit) | F²MC-16LX (16-bit) | F²MC-16LX (16-bit) |
| Maximum Clock Frequency | 16 MHz | 16 MHz | 16 MHz | 16 MHz | 16 MHz | 16 MHz |
| Program Memory | 64 KB Flash | 64 KB Flash | 64 KB Flash | 64 KB Flash | 64 KB Flash | 128 KB Flash (2x) |
| On-chip CAN Controller | Full-CAN 2.0A/B, 16 buffers | Full-CAN 2.0A/B | Full-CAN 2.0A/B | Full-CAN 2.0A/B | Full-CAN 2.0A/B | Multi-channel full-CAN |
| Operating Temperature | -40 °C to +105 °C | -40 °C to +105 °C | 0 °C to +70 °C (commercial) | -40 °C to +105 °C | -40 °C to +105 °C | -40 °C to +105 °C |
主要差異化特點
- Full-CAN controller with 16 message buffers integrated on a 16-bit F²MC-16LX core in 48-LQFP (對比MB90497GPMC-GS-258E1)
- Automotive-grade temperature screening at the standard 64 KB Flash budget (對比CY90F387SPMCR-GSE1)
- 16 MHz CPU core clock with full peripheral clocking at the same frequency (對比MB90497GPMC-GS-258E1)
設計說明
Estimated: at 16 MHz CPU and full CAN traffic the F²MC-16LX core draws about 30 mA from a 5 V rail. Place a 100 nF ceramic decoupling capacitor within 5 mm of every VCC/VSS pin pair and add a single 10 µF bulk tantalum or ceramic near the package. Tie AVCC to VCC with a separate ferrite bead to isolate A/D converter noise, and route the analog ground as a single point back to the VSS pin near the AVCC pin.
Brown-out detection on the MB90385 must be enabled in the firmware configuration register before connecting to the vehicle battery. Failure to do so can lead to undefined execution on cranking transients where VCC drops below 4.5 V. Configure the MD0/MD1 mode pins with a 10 kΩ pullup to VCC for normal run-mode and a 10 kΩ pulldown to VSS only during in-circuit flash programming.
Route the CANH and CANL differential pair as a 120 Ω impedance-controlled pair with matched length within 5 mm. Place a 120 Ω split termination (two 60 Ω resistors with a 10 nF capacitor to ground) at each end of the bus. Keep the CAN pair at least 3 mm away from switching signals such as PWM lamp drivers to avoid common-mode injection into the CAN transceiver.
The MB90385 10-bit A/D is susceptible to digital switching noise. Sample the A/D with the MCU core halted (use a hardware trigger from a timer) or in sleep mode to avoid digital switching coupling into the analog reference. The internal A/D reference is typically 5 V; for better than 10-bit absolute performance, drive the AVREF pin from a dedicated low-noise reference source.
合規資訊
AEC-Q100 automotive qualification supported per Infineon product page; RoHS and REACH compliant. Halogen-free status not explicitly listed in the verified distributor data.
