DG403DJ+ - Dual High-Speed SPDT Analog Switch | Analog Devices
MPN： DG403DJ+ ✓ 啟用中DG403DJ+ 概覽
An analog switch is a semiconductor device that connects or disconnects analog signal paths under digital control. The DG403DJ+ belongs to the monolithic CMOS analog switch hierarchy, where each SPDT pole can route one source node to either of two destination nodes. This makes the device useful for signal routing, sampling, test systems, measurement equipment, and audio or communication circuits that require controlled bidirectional analog paths.
Key characteristics include low analog ON resistance, fast switching, and low charge injection. Charge injection is the unwanted voltage pulse produced when control charge enters the analog signal node during a transition. Because the DG403DJ+ limits this effect, it simplifies precise sample-and-hold and switched-capacitor circuits. The TTL- and CMOS-compatible inputs simplify interfacing with both older logic families and modern low-voltage digital controllers.
The DG403DJ+ uses a monolithic CMOS implementation to provide low power consumption while supporting bidirectional analog conduction. The Analog Devices product page identifies the DG403 family as production devices and describes a redesigned series with guaranteed on-resistance matching of 2 ohm maximum, on-resistance flatness of 3 ohm maximum, typical on-resistance of 20 ohm, and low charge injection of 15 pC maximum for applicable family specifications.
Typical uses include precision analog signal selection, sample-and-hold front ends, automated test equipment, audio routing, and instrumentation where a digital controller must select between two signal sources. Each switch can operate in either signal direction because the on-resistance is specified for bidirectional analog conduction.
A practical design consideration is to keep input and output traces short and minimize parasitic capacitance around control and analog nodes. Because charge injection and switching transients are inherent to the transition process, the selected source impedance, downstream capacitance, and acquisition timing should be evaluated together rather than relying only on the 150 ns maximum turn-on time.
This page consolidates manufacturer information, distributor pricing, verified same-package alternatives, and application-focused design guidance. It also distinguishes documented family-level specifications from parameters that were not present in the supplied source data, making the remaining engineering uncertainties explicit.
直接替換替代品，適用於 DG403DJ+ — 相同封裝，腳位對腳位相容。需重新設計 PCB 的不同封裝零件不列入。
此系列的變體
與下列產品可直接替換的同系列型號： DG403DJ+ （相同外形與佔位） — 差異在於 Number of Switches, On-Resistance Flatness, On-Resistance Matching, Package.
DG403DJ-E3
✅ 直接替換📋 參考替代品（不在目錄中）
DG403DJ
✅ 直接替換📋 參考替代品（不在目錄中）
DG403DJ
✅ 直接替換📋 參考替代品（不在目錄中）
DG403DJ+ 最大額定值與電氣特性
| Switch Type | Dual SPDT analog switch |
| Number of Switches | 2 circuits |
| On Resistance | 45 ohm maximum |
| Turn-On Time | Less than 150 ns |
| Control Input Compatibility | TTL and CMOS compatible |
| 封裝 | 16-pin PDIP |
| Technology | Monolithic CMOS |
| Switching Direction | Bidirectional analog conduction |
| Charge Injection | 15 pC maximum |
| On-Resistance Matching | 2 ohm maximum |
| On-Resistance Flatness | 3 ohm maximum |
| Off Leakage Current | Less than 5 nA at +85 C |
| Power Consumption | 0.35 uW typical |
DG403DJ+ 16-pin pdip 腳位配置指南
DG403DJ+（16-pin pdip 封裝）的腳位配置。 腳位編號、功能與連接圖定義於製造商資料手冊中。請參閱該手冊以取得確切的封裝尺寸與焊接指引。
無詳細腳位定義資料： DG403DJ+.
請參閱 資料表 以查看完整腳位配置。
典型應用
DG403DJ+ 適用於 6 應用s: Sample-and-Hold Signal Selection, Precision Instrumentation Signal Routing, Automated Test Equipment Signal Multiplexing, Audio and Communication Signal Selection, Battery-Powered Portable Measurement, Switched-Capacitor Circuit Control.
Sample-and-Hold Signal Selection
The DG403DJ+ fits sample-and-hold front ends because its two independent SPDT switches can route a selected source into a shared acquisition node. The documented on-resistance below 45 ohm limits source loading, while turn-on time below 150 ns supports rapid source selection. Low charge injection is especially valuable here because control transitions can create unwanted steps on the held capacitor node. In practice, engineers should evaluate the 15 pC maximum family-level charge injection against the feedback capacitance and settling requirements. A short, shielded analog trace and symmetrical placement of the sampling capacitor help minimize leakage and parasitic pickup. Because the supplied data does not include complete absolute maximum ratings, supply-voltage and control-level compatibility must be confirmed from the official DG403 data sheet before implementation.
推薦
Precision Instrumentation Signal Routing
The DG403DJ+ is suitable for instrumentation that must route a sensor, reference, or calibration signal under digital control. Its maximum on-resistance of 45 ohm limits attenuation when driving a reasonably high-impedance instrument input, and bidirectional conduction allows the same switch topology to be used for sourcing or current-return paths. The two independently controlled SPDT circuits provide useful routing flexibility without requiring a separate multiplexer IC. Designers should calculate the settling error caused by 45 ohm resistance and switch capacitance, then include the acquisition window in the measurement sequence. Keeping the selected analog node away from digital control traces reduces capacitive coupling, while a ground plane beneath the analog route provides a low-impedance return path. Verify input overvoltage tolerance against the final sensor and test-signal range.
推薦
Automated Test Equipment Signal Multiplexing
The DG403DJ+ can route test signals between instruments and device-under-test nodes where fast settling and repeatable selection are important. Its turn-on time below 150 ns is short enough to avoid excessive dead time during automated sequences, and the documented 2 ohm maximum on-resistance matching helps maintain channel consistency. A pair of SPDT switches can select between a normal operating stimulus and a calibration or isolation path. The principal trade-off is that 45 ohm maximum on-resistance contributes an error proportional to the source impedance and total on-resistance path. Use short routes, consider a dedicated buffer for high-impedance sources, and include switch transition time in the test sequence. The official data sheet should be consulted for break-before-make timing and any restrictions on floating control or signal pins.
推薦
Audio and Communication Signal Selection
The DG403DJ+ can select between two audio or low-frequency communication paths when a digital controller needs to change routing without mechanical relays. The bidirectional analog behavior permits either source or destination role, and the low on-resistance reduces signal loss. Because the device is designed for precision, high-speed analog switching rather than audio-power amplification, its maximum signal swing and total harmonic distortion must be checked against the application. Keep the analog node compact and maintain a continuous ground reference to reduce crosstalk. The below-150 ns turn-on time is far shorter than human-perceptible audio switching intervals, although mechanical or relay-free switching may still produce transients. For line-level or low-impedance loads, an additional buffer may provide lower effective source impedance than the specified 45 ohm maximum switch resistance.
推薦
Battery-Powered Portable Measurement
The DG403DJ+ is relevant to portable measurement systems where fast analog selection is needed without the bulk of mechanical relays. The documented 0.35 uW typical power consumption keeps static switching power low, while the dual SPDT arrangement provides two routed paths in one package. On-resistance below 45 ohm can preserve measurable signal integrity when the selected source impedance is substantially higher. Battery-operated designs should nevertheless include the control-driver quiescent current and leakage paths in the complete power budget, rather than relying on switch power alone. Use rail-to-rail-compatible control levels within the official absolute maximum ratings, and place a bypass capacitor near the supply pins according to the datasheet guidance. Leakage can become significant with very high source impedances, so source-node guarding and clean PCB layout are important.
推薦
Switched-Capacitor Circuit Control
The DG403DJ+ can implement switched-capacitor functions because low charge injection reduces control-induced errors and fast switching limits the duration of transition artifacts. The two SPDT poles can form sampling, hold, or feedback-routing sections in analog signal-processing designs. Designers should use the documented 15 pC maximum family-level charge injection together with the switched capacitor value to estimate the unwanted step charge. The maximum 45 ohm on-resistance then contributes an additional settling term of approximately RC during each transition, so acquisition time must allow for both switch resistance and stray capacitance. Keep the switch and capacitor on the same side of the analog return path where practical, and route control signals away from the high-impedance node. The supplied sources do not specify the complete switching-time distribution or charge-injection test conditions, so final timing should use the official data sheet curves.
推薦
推薦產品摘要
工程參考資料，適用於 DG403DJ+ — 比較、設計指引及合規資訊。
選型指南
與替代品比較
| 參數 | 本產品 | DG403DJ-E3 | DG403DJ | DG403DJ |
|---|---|---|---|---|
| Package | PDIP-16 | PDIP-16 | PDIP-16 | PDIP-16 |
| Brand | Analog Devices | Analog Devices | Analog Devices | Vishay Intertechnology |
| Switch Configuration | Dual SPDT, 2 circuits | Dual SPDT, same DG403 family | Dual SPDT, 2 circuits | Dual SPDT, 2 circuits |
| On Resistance | 45 ohm maximum | 45 ohm maximum | 45 ohm maximum | 45 ohm maximum |
| Turn-On Time | Less than 150 ns | Less than 150 ns | Less than 150 ns | Less than 150 ns |
| Control Input Compatibility | TTL and CMOS compatible | TTL and CMOS compatible | TTL and CMOS compatible | TTL and CMOS compatible |
| Charge Injection | 15 pC maximum for improved DG403 family | 15 pC maximum for improved family | Family-level value varies by document version | Family-level value varies by document version |
| Power Consumption | 0.35 uW typical | 0.35 uW typical | 0.35 uW typical family value | 0.35 uW typical family value |
| Off Leakage Current | Less than 5 nA at +85 C for improved family | Less than 5 nA at +85 C for improved family | Refer to the applicable legacy data sheet | Refer to the applicable legacy data sheet |
主要差異化特點
- Current improved-family sourcing position (對比DG403DJ)
- Fast dual-SPDT routing in one package (對比DG403DJ)
- Lower and more consistent on-resistance family behavior (對比DG403DJ)
設計說明
Treat the analog terminal as a high-impedance node when charge injection matters. The improved DG403 family is described with low charge injection of 15 pC maximum, but the resulting error step also depends on the connected capacitance. Keep the switched node compact, use a continuous ground reference, and route control inputs away from it. For high-value sampling nodes, evaluate the error from charge injection and from the 45 ohm maximum on-resistance settling term separately.
Place the 16-pin PDIP according to the official land pattern and keep analog traces short because the switch contributes up to 45 ohm of series resistance plus package and PCB parasitics. Avoid long stubs and test-probe-only branches on sensitive analog nodes. Provide a low-impedance ground plane under the device and decouple the supply pins in accordance with the manufacturer data sheet; the supplied source excerpts do not include the complete bypass-capacitor recommendation.
Do not treat DG403CJ+ as an automatic substitute for DG403DJ+ solely because both are described as 16-pin DIP SPDT switches; package construction and footprint may differ. Confirm numbered pin assignments, control polarity, supply range, and absolute maximum ratings from the current official data sheet before substituting any legacy Harris, Intersil, or Vishay DG403DJ. Also avoid inferring that the DG403DJ+ and legacy DG403DJ have identical guaranteed leakage, matching, and flatness limits.
合規資訊
The supplied web results do not explicitly state RoHS, REACH, lead-free, halogen-free, or conflict-minerals status. The Analog Devices DG403 page identifies the family as production, but package suffix and environmental declarations should be confirmed on the current manufacturer product page before release.