DSPIC33FJ128MC706T-I/PT - 40 MIPS 128KB Flash dsPIC33F MCU | Microchip
MPN: DSPIC33FJ128MC706T-I/PT ✓ 啟用中DSPIC33FJ128MC706T-I/PT 概覽
What is a dsPIC33F Digital Signal Controller? A Digital Signal Controller combines the deterministic interrupt response and peripheral set of a microcontroller with the computational throughput of a digital signal processor. The dsPIC33F architecture is positioned within Microchip's portfolio between standard PIC24 microcontrollers and the higher-end dsPIC33E families, and is widely used in motor control, power conversion, and high-speed sensor fusion. It sits in the broader hierarchy: microcontroller -> 16-bit MCU -> dsPIC DSC -> motor-control DSC.
Key features include a 40 MHz internal oscillator with 4x PLL, dual 16-bit timer/counter modules, motor-control PWM with up to 8 outputs and dedicated fault inputs, two 10-bit ADCs supporting up to 1.1 Msps combined throughput, a 16-channel input multiplexer, UART/SPI/I2C/CAN peripherals, and an integrated DMA controller. The device also supports 5V tolerant digital inputs on select pins for mixed-voltage designs.
The dsPIC33FJ128MC706 employs a modified Harvard architecture with 24-bit instruction words and 16-bit data paths, enabling single-cycle MAC operations for FIR/IIR filter implementations. Its DSP engine includes a 40-bit accumulator with hardware saturation, and the on-chip motor-control PWM module supports center-aligned, edge-aligned, and complementary modes with 15-bit time-base resolution for high-resolution switching converters.
Typical applications include brushless DC (BLDC) and permanent-magnet synchronous motor (PMSM) drives, three-phase induction motor control, switched-mode power supply (SMPS) digital control loops, uninterruptible power supplies (UPS), solar inverters, and industrial sensor-signal conditioning where both DSP throughput and real-time MCU determinism are required.
When designing with this device, ensure your power-supply decoupling uses 100 nF ceramic capacitors placed within 3 mm of each VDD/VSS pair. The internal 7.37 MHz Fast RC oscillator can be used with the PLL to derive the 40 MIPS system clock without an external crystal, but applications with tight PWM timing requirements should use an external crystal for accurate frequency stability.
This page synthesizes distributor pricing, drop-in alternative MPNs, and practical design notes that are not found in the standalone manufacturer datasheet. All specifications are anchored to the official Microchip dsPIC33FJ128MC706 datasheet family and current distributor inventory as of 2026-09-26.
直接替換替代品,適用於 DSPIC33FJ128MC706T-I/PT — 相同封裝,腳位對腳位相容。需重新設計 PCB 的不同封裝零件不列入。
此系列的變體
與下列產品可直接替換的同系列型號: DSPIC33FJ128MC706T-I/PT (相同外形與佔位) — 差異在於 Package, Operating Temperature, Timers, ADC, Core Architecture.
DSPIC33FJ128MC706-I/PT
✅ 直接替換聯絡詢價
查看資料表 →DSPIC33FJ128MC706A-I/PT
✅ 直接替換聯絡詢價
查看資料表 →DSPIC33FJ128MC706AT-I/PT
✅ 直接替換聯絡詢價
查看資料表 →DSPIC33FJ128MC506T-I/PT
✅ 直接替換聯絡詢價
查看資料表 →DSPIC33FJ128MC506A-I/PT
✅ 直接替換聯絡詢價
查看資料表 →DSPIC33FJ128MC706T-I/PT 最大額定值與電氣特性
| Core Architecture | dsPIC33F 16-bit DSC |
| Program Memory (Flash) | 128 KB |
| Data RAM | 16 KB |
| Operating Frequency | 40 MIPS (40 MHz) |
| Supply Voltage (VDD) | 3.0 V to 3.6 V |
| 工作溫度範圍 | -40 C to +85 C (Industrial) |
| Digital I/O Pins | 53 (high-current I/O on select pins) |
| ADC | Dual 10-bit SAR, up to 32 channels |
| Motor Control PWM | 8 outputs, dedicated fault inputs |
| Communication Peripherals | UART x2, SPI x2, I2C, ECAN |
| Timers | 16-bit Timer/Counter x5 |
| DMA Controller | 8-channel |
| 封裝 | 64-pin TQFP (10x10 mm) |
| 安裝類型 | Surface Mount |
| MSL 等級 | 3 (168 hours) |
| RoHS 狀態 | Compliant |
| Internal Oscillator | 7.37 MHz Fast RC with PLL |
| DSP Engine | Dual 40-bit accumulators with saturation |
DSPIC33FJ128MC706T-I/PT 腳位配置
| 腳位 1 | RP23/CN23/RC7 — Remappable I/O / PWM fault input |
| 腳位 2 | RP24/CN24/RC8 — Remappable I/O |
| 腳位 3 | RP25/CN25/RC9 — Remappable I/O |
| 腳位 4 | VDD — Digital supply 3.0-3.6 V |
| 腳位 5 | VSS — Digital ground |
| 腳位 6 | OSC1/RC12 — Crystal oscillator input |
| 腳位 7 | OSC2/RC13 — Crystal oscillator output |
| 腳位 8 | FLTA1/RP20/CN20/RD8 — PWM fault input A1 |
| 腳位 9 | FLTA2/RP21/CN21/RD9 — PWM fault input A2 |
| 腳位 10 | FLTA3/RP26/CN26/RD10 — PWM fault input A3 |
| 腳位 11 | FLTA4/RP27/CN27/RD11 — PWM fault input A4 |
| 腳位 12 | RP28/RD0 — Remappable I/O |
| 腳位 13 | RP29/RD1 — Remappable I/O |
| 腳位 14 | RP30/RD2 — Remappable I/O |
| 腳位 15 | RP31/RD3 — Remappable I/O |
| 腳位 16 | VDD — Digital supply |
| 腳位 17 | VSS — Digital ground |
| 腳位 18 | PWM1H/RD4 — PWM output 1 high-side |
| 腳位 19 | PWM1L/RD5 — PWM output 1 low-side |
| 腳位 20 | PWM2H/RD6 — PWM output 2 high-side |
| 腳位 21 | PWM2L/RD7 — PWM output 2 low-side |
| 腳位 22 | PWM3H/RD12 — PWM output 3 high-side |
| 腳位 23 | PWM3L/RD13 — PWM output 3 low-side |
| 腳位 24 | PWM4H/RD14 — PWM output 4 high-side |
| 腳位 25 | PWM4L/RD15 — PWM output 4 low-side |
| 腳位 26 | AVSS — Analog ground |
| 腳位 27 | AVDD — Analog supply |
| 腳位 28 | AN0/RP0/CN2/RB0 — Analog input 0 / remappable I/O |
| 腳位 29 | AN1/RP1/CN3/RB1 — Analog input 1 / remappable I/O |
| 腳位 30 | AN2/RP2/CN4/RB2 — Analog input 2 / remappable I/O |
| 腳位 31 | AN3/RP3/CN5/RB3 — Analog input 3 / remappable I/O |
| 腳位 32 | AN4/RP4/CN6/RB4 — Analog input 4 / remappable I/O |
| 腳位 33 | AN5/RP5/CN7/RB5 — Analog input 5 / remappable I/O |
| 腳位 34 | AN6/RP6/CN8/RB6 — Analog input 6 / remappable I/O |
| 腳位 35 | AN7/RP7/CN9/RB7 — Analog input 7 / remappable I/O |
| 腳位 36 | AN8/RP8/CN10/RB8 — Analog input 8 / remappable I/O |
| 腳位 37 | AN9/RP9/CN11/RB9 — Analog input 9 / remappable I/O |
| 腳位 38 | AN10/RP10/CN12/RB10 — Analog input 10 / remappable I/O |
| 腳位 39 | AN11/RP11/CN13/RB11 — Analog input 11 / remappable I/O |
| 腳位 40 | AN12/RP12/CN14/RB12 — Analog input 12 / remappable I/O |
| 腳位 41 | AN13/RP13/CN15/RB13 — Analog input 13 / remappable I/O |
| 腳位 42 | AN14/RP14/CN16/RB14 — Analog input 14 / remappable I/O |
| 腳位 43 | AN15/RP15/CN17/RB15 — Analog input 15 / remappable I/O |
| 腳位 44 | VDD — Digital supply |
| 腳位 45 | VSS — Digital ground |
| 腳位 46 | RP16/CN18/RC0 — Remappable I/O |
| 腳位 47 | RP17/CN19/RC1 — Remappable I/O |
| 腳位 48 | RP18/RC2 — Remappable I/O |
| 腳位 49 | RP19/RC3 — Remappable I/O |
| 腳位 50 | RP9/RC4 — Remappable I/O |
| 腳位 51 | RP10/RC5 — Remappable I/O |
| 腳位 52 | RP11/RC6 — Remappable I/O |
| 腳位 53 | RP12/RC7 — Remappable I/O |
| 腳位 54 | RP13/RC8 — Remappable I/O |
| 腳位 55 | RP14/RC9 — Remappable I/O |
| 腳位 56 | TMS/RP22/CN22/RC10 — JTAG TMS / remappable I/O |
| 腳位 57 | TCK/RP23/CN23/RC11 — JTAG TCK / remappable I/O |
| 腳位 58 | TDI/RP24/CN24/RC12 — JTAG TDI / remappable I/O |
| 腳位 59 | TDO/RP25/CN25/RC13 — JTAG TDO / remappable I/O |
| 腳位 60 | MCLR — Master clear / reset input |
| 腳位 61 | RP5/INT0/RF0 — External interrupt 0 |
| 腳位 62 | RP6/INT1/RF1 — External interrupt 1 |
| 腳位 63 | RP7/INT2/RF2 — External interrupt 2 |
| 腳位 64 | RP8/INT3/RF3 — External interrupt 3 |
典型應用
DSPIC33FJ128MC706T-I/PT 適用於 6 應用s: Brushless DC (BLDC) Motor Control, Permanent Magnet Synchronous Motor (PMSM) Drives, Switched-Mode Power Supply (SMPS) Digital Control, Uninterruptible Power Supply (UPS) and Solar Inverter, Industrial Sensor Signal Conditioning, Three-Phase Induction Motor VFD.
Brushless DC (BLDC) Motor Control
The DSPIC33FJ128MC706T-I/PT is purpose-built for BLDC motor drives, where its 40 MIPS DSP engine executes field-oriented control (FOC) algorithms in real-time with sub-microsecond interrupt latency. The integrated 8-channel motor-control PWM module supports center-aligned switching with dedicated fault inputs, enabling safe three-phase commutation at 20 kHz. The dual 10-bit ADC with DMA support samples BEMF signals without CPU overhead, allowing closed-loop torque and speed control for sub-1 kW motors used in pumps, fans, and small EV traction drives.
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Permanent Magnet Synchronous Motor (PMSM) Drives
For PMSM servo applications, the DSPIC33FJ128MC706T-I/PT delivers the computational throughput needed for sensorless FOC with high-frequency signal injection. Its DSP MAC unit executes Park/Clarke transforms and space-vector modulation in a single cycle, while the 16 KB SRAM holds per-cycle state variables and reference frames. The integrated ECAN peripheral enables multi-axis daisy-chaining in industrial servo networks. Microchip application note AN1292 documents a complete PMSM reference design on this part.
推薦
Switched-Mode Power Supply (SMPS) Digital Control
In digitally controlled SMPS designs, the DSPIC33FJ128MC706T-I/PT closes the voltage and current control loops in firmware rather than analog circuitry. Its high-resolution PWM with 15-bit time-base supports digital PFC and LLC converter topologies running at switching frequencies up to 2 MHz when paired with external gate drivers. The 40 MIPS throughput executes current-mode control, slope compensation, and soft-start sequencing without saturating CPU cycles. Dual ADC cores sample primary and secondary current/voltage simultaneously for multi-loop topologies.
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Uninterruptible Power Supply (UPS) and Solar Inverter
For grid-tied solar inverters and UPS systems, the DSPIC33FJ128MC706T-I/PT runs MPPT, anti-islanding, and sine-wave PWM generation within a single chip. Its ECAN interface enables communication with battery management and grid-monitoring peripherals, while the DMA controller offloads ADC-to-memory transfers to keep the CPU free for power-quality algorithms. The industrial -40 C to +85 C temperature range and 3.3 V operation match solar inverter power-stage requirements without additional level shifters.
推薦
Industrial Sensor Signal Conditioning
The DSPIC33FJ128MC706T-I/PT integrates a dual 10-bit ADC with DMA support, making it suitable for multi-channel industrial sensor acquisition such as strain-gauge bridges, RTD temperature sensors, and 4-20 mA loop transmitters. Its DSP engine executes digital filtering (FIR/IIR), linearization, and calibration routines in real-time, replacing discrete analog conditioning circuits. The ECAN and UART peripherals interface with industrial PLC networks for factory-floor sensor hubs.
推薦
Three-Phase Induction Motor VFD
Variable-frequency drives for three-phase induction motors rely on the DSPIC33FJ128MC706T-I/PT's 8-channel motor-control PWM and DSP engine to execute V/Hz and direct-torque-control algorithms. The integrated ECAN and UART peripherals support Modbus and CANopen industrial protocols for VFD networking. The 64-pin TQFP package with 53 digital I/O pins provides sufficient GPIO for gate-driver enable signals, relay control, and fault-feedback inputs without external logic. According to Microchip reference designs, this part powers VFDs from 0.25 kW to 7.5 kW.
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推薦產品摘要
工程參考資料,適用於 DSPIC33FJ128MC706T-I/PT — 比較、設計指引及合規資訊。
選型指南
與替代品比較
| 參數 | 本產品 | DSPIC33FJ128MC706-I/PT | DSPIC33FJ128MC706A-I/PT | DSPIC33FJ128MC706AT-I/PT | DSPIC33FJ128MC506T-I/PT | DSPIC33FJ128MC506A-I/PT |
|---|---|---|---|---|---|---|
| Package | 64-pin TQFP (10x10 mm) | 64-pin TQFP (10x10 mm) - same | 64-pin TQFP (10x10 mm) - same | 64-pin TQFP (10x10 mm) - same | 64-pin TQFP (10x10 mm) - same footprint | 64-pin TQFP (10x10 mm) - same footprint |
| Brand | Microchip Technology | Microchip Technology - same | Microchip Technology - same | Microchip Technology - same | Microchip Technology - same | Microchip Technology - same |
| Flash Memory | 128 KB | 128 KB | 128 KB | 128 KB | 64 KB (-50%) | 64 KB (-50%) |
| RAM | 16 KB | 16 KB | 16 KB | 16 KB | 8 KB (-50%) | 8 KB (-50%) |
| Operating Frequency | 40 MIPS (40 MHz) | 40 MIPS | 40 MIPS | 40 MIPS | 40 MIPS | 40 MIPS |
| Packaging Format | Tape & Reel ('T' suffix) | Tray (no 'T' suffix) | Tray | Tape & Reel | Tape & Reel | Tray |
| Silicon Revision | Original '706 (no 'A') | Original | 'A' revision (bug-fix) | 'A' revision | Original '506 | '506A' revision |
| Motor Control PWM | 8 channels | 8 channels | 8 channels | 8 channels | 8 channels | 8 channels |
主要差異化特點
- Highest-density Flash in motor-control family at 64-pin TQFP (對比DSPIC33FJ128MC506T-I/PT)
- Identical silicon in tape-and-reel format for production lines (對比DSPIC33FJ128MC706-I/PT (tray))
- Original silicon revision vs bug-fix 'A' revision (對比DSPIC33FJ128MC706A-I/PT)
設計說明
Estimated: Decoupling budget for the DSPIC33FJ128MC706T-I/PT requires one 100 nF ceramic capacitor per VDD/VSS pair (4 pairs at pins 4/5, 16/17, 44/45 plus AVDD/AVSS at 27/26), plus a bulk 10 uF tantalum or ceramic capacitor on the 3.3 V rail. Place all 100 nF caps within 3 mm of their respective supply pins to minimise switching noise coupling into the analog ADC inputs and motor-control PWM outputs.
Estimated: The 64-pin TQFP (10x10 mm) package has a 0.5 mm lead pitch, requiring PCB footprint pads of 0.30 mm width and 1.50 mm length per IPC-7351 nominal land pattern. Use 4-layer PCB stack-up with a continuous ground plane on layer 2 directly beneath the device to minimise ground bounce during high-current PWM switching. Keep analog and digital signal traces on separate PCB layers to prevent ADC sampling noise.
Do not assume the internal 7.37 MHz Fast RC oscillator is suitable for all applications - while it can drive the 4x PLL to produce 40 MIPS, applications requiring tight PWM timing or UART baud-rate accuracy should use an external crystal on OSC1/OSC2 (pins 6/7). Also note that the 'A' silicon revision (DSPIC33FJ128MC706A) introduces ADC register differences that require firmware recompilation - read the errata document before migrating code between revisions.
合規資訊
RoHS and REACH compliance per Microchip product page. The 'I' suffix denotes industrial -40 C to +85 C temperature grade, not AEC-Q100 automotive grade. For AEC-Q100 qualified variants, see dsPIC33F automotive-grade family members.