ISL26319FVZ - 12-bit 125kSPS 8-ch SAR ADC | Renesas
MPN： ISL26319FVZ ✓ 啟用中ISL26319FVZ 概覽
A SAR ADC is a type of analog-to-digital converter that uses a binary-search algorithm with a comparator and a precision DAC to resolve each conversion one bit at a time. SAR ADCs sit in the broader taxonomy of mixed-signal data converters -> ADCs -> SAR ADCs -> low-power precision ADCs -> integrated circuits. They are favored for industrial instrumentation because they offer deterministic latency, no pipeline delay, and excellent linearity over supply and temperature variations without the power cost of delta-sigma or pipeline architectures.
Key features of the ISL26319FVZ include 12-bit resolution with no missing codes, 125 kSPS maximum sampling rate, INL of ±0.5 LSB (typical), single-ended and pseudo-differential input modes, an on-chip track-and-hold amplifier, and an SPI-/QSPI-/MICROWIRE-compatible serial interface. The integrated input buffer eliminates the need for an external op-amp, reducing BOM cost and board area in multichannel systems.
Technically, the device uses a charge-redistribution DAC array together with a high-bandwidth comparator and a precision reference input. Channel switching is performed through a low-leakage CMOS multiplexer with break-before-make sequencing to prevent channel-to-channel crosstalk. The reference voltage range accepts up to VDD, and the part offers an explicit power-down mode that drops consumption below 1 µA, making it suitable for battery-powered or duty-cycled data acquisition.
Typical applications include industrial process control and PLC analog input modules, multi-channel data acquisition systems for instrumentation, sensor signal conditioning front-ends (thermocouple, RTD, strain-gauge bridges), portable/battery-powered medical monitoring equipment, and factory automation I/O. The 8-channel single-ended capability is particularly useful in systems that aggregate many slow-moving analog signals.
When designing with this ADC, place the reference decoupling capacitor (typically 10 µF ceramic plus 0.1 µF) directly at the REF pin with the shortest possible trace to minimize conversion noise. Route analog and digital grounds as a star-grounded split with a single tie-point under the IC, and avoid switching digital signals near the analog input traces to preserve the converter's SNR.
This page synthesizes Renesas distributor pricing, pin-compatible same-family alternatives (ISL26315FVZ, ISL26312FVZ, ISL26311FBZ), and practical design notes not found in the manufacturer datasheet alone.
直接替換替代品，適用於 ISL26319FVZ — 相同封裝，腳位對腳位相容。需重新設計 PCB 的不同封裝零件不列入。
此系列的變體
與下列產品可直接替換的同系列型號： ISL26319FVZ （相同外形與佔位） — 差異在於 Input Type, Interface, Package, Resolution, RoHS Status.
ISL26315FVZ-T7A
✅ 直接替換聯絡詢價
查看資料表 →ISL26315FVZ-T7A
✅ 直接替換聯絡詢價
查看資料表 →ISL26314FVZ
✅ 直接替換 ⚠️ 規格未經驗證聯絡詢價
查看資料表 →ISL26319FVZ-T7A
✅ 直接替換📋 參考替代品（不在目錄中）
ISL26319FVZ-T13
✅ 直接替換📋 參考替代品（不在目錄中）
ISL26319FVZ 最大額定值與電氣特性
| 解析度 | 12 bit |
| 取樣率 | 125 kSPS |
| Architecture | SAR (Successive Approximation Register) |
| Number of Input Channels | 8 single-ended / 4 differential |
| Input Type | Single-ended and pseudo-differential |
| Analog Supply Voltage (AVDD) | 2.7 V to 5.25 V |
| Digital I/O Supply (VDD) | 1.8 V to 5.25 V |
| Analog Input Voltage Range | 0 V to AVDD (0 V to 5.25 V) |
| Supply Current (full speed) | 2.5 mA typ |
| Power-down Current | <1 µA typ |
| 介面 | SPI / QSPI / MICROWIRE-compatible serial |
| 工作溫度範圍 | -40 °C to +125 °C |
| 封裝 | 16-pin TSSOP |
| 安裝類型 | Surface Mount |
| RoHS 狀態 | Compliant |
ISL26319FVZ 腳位配置
| 腳位 1 | AIN0 — Analog input channel 0 |
| 腳位 2 | AIN1 — Analog input channel 1 |
| 腳位 3 | AIN2 — Analog input channel 2 |
| 腳位 4 | AIN3 — Analog input channel 3 |
| 腳位 5 | AIN4 — Analog input channel 4 |
| 腳位 6 | AIN5 — Analog input channel 5 |
| 腳位 7 | AIN6 — Analog input channel 6 |
| 腳位 8 | AIN7 — Analog input channel 7 |
| 腳位 9 | AGND — Analog ground |
| 腳位 10 | REF — Voltage reference input |
| 腳位 11 | AVDD — Analog supply voltage (2.7 V to 5.25 V) |
| 腳位 12 | CONVST — Conversion start input |
| 腳位 13 | CS — Chip select (active low) |
| 腳位 14 | SCLK — Serial clock input |
| 腳位 15 | SDO — Serial data output |
| 腳位 16 | VDD — Digital I/O supply (1.8 V to 5.25 V) |
典型應用
ISL26319FVZ 適用於 6 應用s: Industrial PLC Analog Input Module, Multi-Channel Data Acquisition System, Sensor Signal Conditioning Front-End, Portable Battery-Powered Medical Monitoring, Factory Automation I/O Modules, Renewable Energy Monitoring & Power Metering.
Industrial PLC Analog Input Module
The ISL26319FVZ is an excellent fit for industrial PLC analog input modules that aggregate many slow-moving analog signals (4-20 mA current loops, 0-10 V field voltages, thermocouple and RTD outputs) into a single backplane. Its 8 single-ended or 4 differential channels cover the typical 8-channel PLC module density with one ADC, and the integrated input buffer amplifier removes the need for an external op-amp driver network. The -40 °C to +125 °C industrial temperature range ensures reliable operation inside an enclosed control cabinet, while the SPI/QSPI/MICROWIRE-compatible serial interface attaches directly to a host MCU or FPGA without glue logic. Across a 125 kSPS aggregate sampling rate, all 8 channels can be swept in well under 1 ms for real-time control loops.
推薦
Multi-Channel Data Acquisition System
Standalone multi-channel data acquisition boards use the ISL26319FVZ to digitize 8 single-ended sensors through one serial interface, dramatically reducing FPGA/MCU pin count and BOM cost. The integrated track-and-hold and input buffer preserve signal integrity for high-impedance sources such as strain-gauge bridges or piezoelectric sensors, while the 12-bit, no-missing-codes performance delivers reliable precision for laboratory and bench instrumentation. The 125 kSPS throughput supports simultaneous sampling applications (order a few kSPS per channel) when oversampling is not required, and the explicit hardware power-down pin (less than 1 µA) lets the system duty-cycle for battery or solar-powered field DAQ. Reference the design with a 4.096 V external reference (such as the ISL21009) for optimum full-scale range.
推薦
Sensor Signal Conditioning Front-End
Thermocouple, RTD, thermistor, and bridge-sensor front-ends benefit from the ISL26319FVZ's on-chip input buffer and 8-channel multiplexer. Conditioning circuits built from instrumentation amplifiers (such as the ISL28217) can feed up to 8 conditioned analog outputs into one ADC, eliminating the need for a dedicated ADC per channel. The 0 V to AVDD analog input range maps directly to most unipolar sensor outputs after signal conditioning, and the 12-bit, 125 kSPS capability is sufficient for thermal monitoring loops (order 10 Hz per channel) and pressure/flow sensing (order 1 kHz per channel). The digital interface is SPI-compatible and connects directly to a Cortex-M host MCU with no logic-level shifters.
推薦
Portable Battery-Powered Medical Monitoring
Portable medical monitoring devices (pulse oximeters, multi-parameter patient monitors, ambulatory ECG recorders) use the ISL26319FVZ for its combination of 8-channel density, low 2.5 mA typical supply current, and sub-1 µA hardware power-down mode. The wide 2.7 V to 5.25 V analog supply range lets the design run directly from a single Li-ion cell (with boost) or 3.3 V LDO, while the separate 1.8 V to 5.25 V digital supply pins interface to low-power MCUs. Multiple sensor channels (SpO2, temperature, respiration, motion) can share the same ADC, and the SAR architecture's deterministic single-cycle conversion is critical for medical timing accuracy.
推薦
Factory Automation I/O Modules
Distributed factory automation I/O modules (IP67 remote I/O, machine-mount blocks, smart sensor hubs) digitize many 24 V industrial signals at the edge using the ISL26319FVZ. Its 8-channel single-ended multiplexer pairs naturally with resistive dividers or current-sense amplifiers that bring 4-20 mA / 0-10 V field signals into the 0-VAVDD range. The robust -40 °C to +125 °C operating range handles unconditioned cabinet environments, and the SPI serial interface attaches to any industrial MCU (such as the Renesas RA4M or RX111) for EtherCAT, PROFINET, or IO-Link fieldbus aggregation. With the part's low 2.5 mA supply current, even densely populated I/O blocks stay within thermal and power budget.
推薦
Renewable Energy Monitoring & Power Metering
Solar inverter monitoring, battery management telemetry, and three-phase power metering all use the ISL26319FVZ as a low-cost auxiliary digitizer for voltage, current, and temperature channels. The 8-channel multiplexer handles the multi-phase voltage divider network plus multiple battery-cell temperature sensors without an external mux, and the 12-bit, 125 kSPS capability is sufficient for slower power-quality monitoring channels. The SAR architecture provides deterministic single-cycle conversions that align with the controller's zero-crossing and RMS calculations. In solar combiner boxes or battery management boards the ADC's <1 µA power-down mode lets it stay idle most of the time, waking only on demand for a burst of measurements.
推薦
推薦產品摘要
工程參考資料，適用於 ISL26319FVZ — 比較、設計指引及合規資訊。
選型指南
與替代品比較
| 參數 | 本產品 | ISL26315FVZ | ISL26315FVZ-T7A | ISL26314FVZ | ISL26319FVZ-T7A | ISL26319FVZ-T13 |
|---|---|---|---|---|---|---|
| Brand | Renesas Electronics | Renesas Electronics | Renesas Electronics | Renesas Electronics | Renesas Electronics | Renesas Electronics |
| Package | 16-pin TSSOP | 16-pin TSSOP - same | 16-pin TSSOP - same | 16-pin TSSOP - same | 16-pin TSSOP - same | 16-pin TSSOP - same |
| Resolution | 12 bit | 12 bit | 12 bit | 12 bit | 12 bit | 12 bit |
| Sampling Rate | 125 kSPS | 125 kSPS | 125 kSPS | 125 kSPS | 125 kSPS | 125 kSPS |
| Single-ended Channels | 8 | 4 (-50%) | 4 (-50%) | 4 (-50%) | 8 (same) | 8 (same) |
| Differential Channels | 4 | 2 (-50%) | 2 (-50%) | 2 (-50%) | 4 (same) | 4 (same) |
| Analog Supply | 2.7 V to 5.25 V | 2.7 V to 5.25 V | 2.7 V to 5.25 V | 2.7 V to 5.25 V | 2.7 V to 5.25 V | 2.7 V to 5.25 V |
| Operating Temperature | -40 °C to +125 °C | -40 °C to +125 °C | -40 °C to +125 °C | -40 °C to +125 °C | -40 °C to +125 °C | -40 °C to +125 °C |
| Carrier Format | Tube | Tube | Tape & Reel (7-inch) | Tube | Tape & Reel (7-inch) | Tape & Reel (13-inch) |
主要差異化特點
- 8-channel density in a compact 16-pin TSSOP package (對比ISL26315FVZ)
- On-chip input buffer amplifier eliminates external driver op-amps (對比ISL26311FBZ)
- Wide 1.8 V to 5.25 V digital I/O supply eliminates level shifters (對比ISL26314FVZ)
- Sub-1 µA hardware power-down mode (對比ISL26319FVZ-T7A)
設計說明
Decouple AVDD with a 10 µF low-ESR ceramic capacitor in parallel with a 0.1 µF ceramic placed as close as possible to the AVDD pin. The digital VDD pin should also have its own 0.1 µF decoupling capacitor placed within 3 mm of the pin. Star-ground AGND and DGND to a single tie-point directly under the IC's exposed paddle to avoid ground-loop noise injection into the analog section.
Route the analog input traces as short, symmetrical, parallel lines away from switching digital signals (SCLK, CS, SDO) to minimize crosstalk. Place the REF bypass capacitor (typically 10 µF ceramic plus 0.1 µF) directly at the REF pin. If a 16-pin TSSOP without an exposed paddle is used, ensure the AGND pin has a low-impedance connection to the ground plane via multiple vias to limit thermal and electrical ground bounce.
Do not exceed the absolute maximum analog input voltage of AVDD + 0.3 V on any AIN pin, or the ESD diodes will forward-conduct and corrupt the conversion. Ensure the reference voltage source can supply the REF pin dynamic current (a few mA during conversion) - high-impedance references cause gain errors. When operating in pseudo-differential mode, route the negative input through the dedicated COM or AIN7 pin to preserve CMRR. Estimated: input current per AIN pin during conversion peaks at approximately 20 µA based on the SAR architecture; the external driving op-amp must settle within the acquisition window.
SCLK frequencies above 10 MHz require careful trace-impedance control (50 Ω characteristic impedance recommended) to avoid ringback on SDO. If the host MCU cannot meet the SCLK minimum high/low timing, insert a small series damping resistor (22-33 Ω) at the SDO pin to limit overshoot. For long SPI cable harnesses (>50 mm), buffer the SCLK, CS, and SDO lines with a 74HC04 or equivalent gate driver to preserve signal integrity.
合規資訊
RoHS and lead-free compliance per Renesas product page. AEC-Q100 automotive grade is not available in the ISL26310 family; for AEC-Q100-qualified ADCs in the same package, consider the ADC124S021 or ADS7824 families.