MAX172BCNG - 12-Bit 100kSPS CMOS ADC with On-Chip Reference | DIP-24
MPN： MAX172BCNG ✗ 停產MAX172BCNG 概覽
An SAR ADC is a type of analog-to-digital converter that uses a binary search algorithm across an internal capacitive DAC to digitize an analog input in N clock cycles for N-bit resolution. The MAX172 sits in the broader hierarchy of ADC architectures: it is a SAR ADC, which itself is a sub-type of medium-speed, medium-resolution data converter (12 bits, 100 kSPS) sitting between slower integrating ADCs (e.g., dual-slope) and faster flash or pipelined ADCs. SAR ADCs are favored when designers need deterministic latency, zero pipeline delay, and a small external component count - making the MAX172 a typical choice for embedded instrumentation front-ends.
Key features include a built-in buried-zener reference for low drift and low noise, ±5V input range (unipolar 0 to 5V or bipolar ±5V via external scaling), three-state outputs for direct bus connection, and an on-chip clock. The buried-zener reference topology provides better long-term stability and lower temperature drift than bandgap references common in CMOS ADCs of this era, which directly improves absolute-accuracy and gain-drift performance across -40C to +85C commercial operating temperatures.
Typical applications include process control, data acquisition boards, panel meters, weigh scales, digital signal processor front-ends, and any 12-bit measurement channel where simple parallel-readback from a microcontroller or FPGA is preferred over a serial interface.
When designing with this part, note that 12-bit absolute accuracy requires careful analog front-end design (input amplifier settling, charge-kickback filtering) and that the through-hole PDIP package is preferred for hand-soldered prototypes and industrial control modules rather than high-density SMT boards.
直接替換替代品，適用於 MAX172BCNG — 相同封裝，腳位對腳位相容。需重新設計 PCB 的不同封裝零件不列入。
此系列的變體
與下列產品可直接替換的同系列型號： MAX172BCNG （相同外形與佔位） — 差異在於 Package, Resolution, Mounting Type, Data Interface, Input Voltage Range.
MAX172BCNG+
✅ 直接替換📋 參考替代品（不在目錄中）
MAX172AENG
✅ 直接替換📋 參考替代品（不在目錄中）
MAX173CNG
✅ 直接替換📋 參考替代品（不在目錄中）
MAX191ACNG
✅ 直接替換📋 參考替代品（不在目錄中）
MAX128BCNG
✅ 直接替換聯絡詢價
查看資料表 →MAX156BCNG
✅ 直接替換聯絡詢價
查看資料表 →MAX172BCNG 最大額定值與電氣特性
| 解析度 | 12 bits |
| Conversion Time | 10 us |
| Throughput (Sample Rate) | 100 kSPS |
| Architecture | SAR (Successive Approximation) |
| Number of Channels | 1 |
| Input Type | Single-Ended |
| Data Interface | Parallel (12-bit) |
| 輸入電壓範圍 | 0 V to 5 V (unipolar) / ±5 V (bipolar with external scaling) |
| 供應電壓 | +5 V (single supply) |
| Reference Type | Internal buried zener |
| 工作溫度 | 0C to +70C (commercial grade, B suffix) |
| 封裝 | 24-pin PDIP (NG) |
| 安裝類型 | Through-Hole (DIP) |
| Sample Rate (max) | 100 kSPS |
MAX172BCNG 腳位配置
| 腳位 1 | VREF — Reference Voltage Output/Input (buffered buried zener) |
| 腳位 2 | REFADJ — Reference adjust |
| 腳位 3 | AGND — Analog Ground |
| 腳位 4 | AIN — Analog Input |
| 腳位 5 | RANGE — Input range select |
| 腳位 6 | DGND — Digital Ground |
| 腳位 7 | VDD — +5V supply |
| 腳位 8 | CS — Chip Select (active low) |
| 腳位 9 | RD — Read (active low) |
| 腳位 10 | BUSY — Busy / End of Conversion |
| 腳位 11 | HBEN — High Byte Enable |
| 腳位 12 | D11 — Data Bit 11 (MSB) |
| 腳位 13 | D10 — Data Bit 10 |
| 腳位 14 | D9 — Data Bit 9 |
| 腳位 15 | D8 — Data Bit 8 |
| 腳位 16 | D7 — Data Bit 7 |
| 腳位 17 | D6 — Data Bit 6 |
| 腳位 18 | D5 — Data Bit 5 |
| 腳位 19 | D4 — Data Bit 4 |
| 腳位 20 | D3 — Data Bit 3 |
| 腳位 21 | D2 — Data Bit 2 |
| 腳位 22 | D1 — Data Bit 1 |
| 腳位 23 | D0 — Data Bit 0 (LSB) |
| 腳位 24 | WR/RCLK — Write / Conversion Start |
典型應用
MAX172BCNG 適用於 6 應用s: Industrial Data Acquisition Board, Process Control Analog Front-End, Panel Meter and Weigh-Scale Design, Embedded DSP / Microcontroller Sensor Input, Rack-Mount Instrumentation Module, Legacy Replacement in Maintenance / Repair Operations.
Industrial Data Acquisition Board
The MAX172BCNG's 12-bit resolution at 100 kSPS and parallel data bus are well-matched to multi-channel industrial data-acquisition cards that read sensors at moderate speeds. The internal buried-zener reference eliminates the cost of an external REF02/ADR01 chip, while the 24-pin PDIP package is preferred for ruggedized through-hole industrial PCBs. Designers typically pair the ADC with an input op-amp front-end, then latch D0-D11 into an FPGA or 8051 family microcontroller using CS and RD control lines.
推薦
Process Control Analog Front-End
The MAX172BCNG converts a 0-5V or ±5V analog process variable (temperature, pressure, flow) into a 12-bit parallel word read directly by a PLC or DSP controller. With 10us conversion time and single +5V supply, it suits 4-20mA loop-powered or panel-mount instrumentation. The internal buried-zener reference provides low drift over the commercial 0-70C operating range, which is important for stable process measurements in factory-floor environments.
推薦
Panel Meter and Weigh-Scale Design
Weigh scales and digital panel meters require stable 12-bit accuracy and an internal reference to keep the BOM small. The MAX172BCNG's buried-zener reference, parallel interface, and easy through-hole DIP-24 package suit handheld bench instruments and through-hole production modules. With one ADC per scale channel, the device pairs with a load-cell op-amp (e.g., MAX145 series instrumentation front-end) and a display driver for a complete weigh-scale bill of materials.
推薦
Embedded DSP / Microcontroller Sensor Input
Embedded DSP and 8/16-bit microcontroller boards use the MAX172BCNG to digitize analog sensors at 100 kSPS while the CPU performs the read in a single bus cycle. The MAX172's three-state output buffers prevent bus contention on shared data buses, and the BUSY/EOC pin allows the CPU to wait or interrupt on conversion-complete. Common pairings include an 8051 or HC11 reading motor-control sensor signals, with D0-D11 directly captured on a single MOV instruction.
推薦
Rack-Mount Instrumentation Module
Rack-mount test and measurement modules use the MAX172BCNG because its parallel interface eliminates the latency of serial ADC protocols. The 24-pin DIP package is well suited to hand-soldered prototype instrumentation and through-hole backplanes that require industrial robustness. Combined with the buried-zener reference, the MAX172 delivers stable 12-bit absolute accuracy across the 0-70C commercial temperature range, which is important for laboratory and production-line test gear.
推薦
Legacy Replacement in Maintenance / Repair Operations
Many production-line test fixtures and military/aerospace subsystems designed in the 1990s still use the MAX172BCNG on their analog input boards. With the part in NRND status, MRO operations rely on remaining distributor stock plus drop-in replacements such as the MAX172BCNG+ (RoHS version) or the MAX172AENG (extended-temperature grade) to keep equipment running. The shared 24-pin PDIP footprint means a repair technician can swap the chip without modifying the surrounding analog front-end or microcontroller interface logic.
推薦
推薦產品摘要
工程參考資料，適用於 MAX172BCNG — 比較、設計指引及合規資訊。
選型指南
與替代品比較
| 參數 | 本產品 | MAX172BCNG+ | MAX172AENG | MAX173CNG | MAX191ACNG | MAX128BCNG | MAX156BCNG |
|---|---|---|---|---|---|---|---|
| Brand | Analog Devices (formerly Maxim Integrated) | Analog Devices | Analog Devices | Analog Devices | Analog Devices | Analog Devices | Analog Devices |
| Package | PDIP-24 (NG) | PDIP-24 (NG) - same | PDIP-24 (NG) - same | PDIP-24 (NG) - same | PDIP-24 (NG) - same | PDIP-24 (NG) - same | PDIP-24 (NG) - same |
| Resolution | 12 bits | 12 bits | 12 bits | 12 bits | 12 bits | 12 bits (multi-channel) | 12 bits (multi-channel) |
| Architecture | SAR | SAR | SAR | SAR | SAR | SAR | SAR |
| Data Interface | Parallel 12-bit | Parallel 12-bit | Parallel 12-bit | Parallel | Parallel | Parallel | Parallel |
主要差異化特點
- Integrated buried-zener voltage reference (對比MAX173CNG)
- Single-supply +5V operation with parallel 12-bit bus (對比MAX155AEWI (8-bit multi-channel))
- Commercial 0-70C 'B' temperature grade (對比MAX172AEWG (extended -40 to +85C))
設計說明
Decouple VDD (pin 7) with a 10uF electrolytic bulk capacitor and a 100nF ceramic capacitor placed within 5 mm of the supply pin. According to the MAX172 datasheet, clean analog supply decoupling is required to keep the internal buried-zener reference free from digital switching noise. Avoid running high-current digital return currents under the AGND/DGND pins - use separate analog and digital ground returns that meet only at the ADC's GND pins. Estimated: assuming VDD = 5V and typical quiescent current per the datasheet, the device draws modest active power; for absolute quiescent/active numbers consult the datasheet Electrical Characteristics table.
For through-hole DIP-24 designs, route the 12 parallel data lines (D0-D11) as a clean bus with matched lengths, and keep the analog input trace short and guarded by ground copper on both sides. According to the MAX172 datasheet application section, the AIN trace should be isolated from digital bus lines to avoid capacitive coupling. Place the analog input RC filter (typically 1kohm + 10nF) within 5 mm of pin 4 to provide charge-kickback absorption between conversions.
Do not leave unused digital output pins floating if they share a bus - tie them to VDD through 100 kohm resistors or enable the HBEN/three-state control per the datasheet timing diagram. Avoid driving the analog input above VDD or below AGND; if bipolar ±10V signals are needed, use an external op-amp front-end to scale into the 0-5V input range. According to the datasheet, exceeding the input range permanently damages the ADC. CS must be held high (de-selected) when not reading to keep BUSY/CNT in the correct state.
合規資訊
RoHS/REACH/lead-free compliance not specified in the verified data supplied - the '+' suffix version (MAX172BCNG+) is documented as RoHS-compliant per distributor listings, but the bare MAX172BCNG status was not confirmed. AEC-Q100 not applicable (this is a through-hole legacy ADC, not automotive-qualified).
