SI21662-B22-GMR - Dual DVB-S/S2 Satellite TV Demodulator | Skyworks
MPN： SI21662-B22-GMR ✗ 停產SI21662-B22-GMR 概覽
A satellite demodulator is a category of baseband signal-processing IC that converts the digitized IF output from a tuner into MPEG transport streams (or LVDS / parallel TS to an external host decoder). It belongs to the broader hypernym hierarchy: demodulator -> tuner/demodulator can -> receiver subsystem -> digital TV front-end -> consumer video SoC ecosystem. Modern DVB-S2 systems additionally apply LDPC forward-error-correction, so an Si2166x family device must pair with a low-noise PLL that meets the phase-noise mask demanded by 32APSK constellations.
Key features include dual independent DVB-S/DVB-S2/DSS demodulation channels, 32APSK and 16APSK support for high-efficiency DVB-S2 transponders, integrated LDPC and BCH FEC engines, DiSEqC 1.x and 2.x interface support, and a flexible TS output interface with serial, parallel and LVDS options. An on-chip programmable clock recovery synthesizer removes the need for an external VCXO in most designs, reducing BOM cost. The 68-QFN (8x8 mm) exposed-pad package supports a thermal resistance (theta_JA) suitable for the typical 0.6 W power dissipation of the device under full dual-channel load.
The SI21662-B22-GMR uses Skyworks' proprietary dual demodulator core architecture that shares the analog AGC loop and host interface between channels. Each demodulator includes its own channel filter, symbol-rate Nyquist filter, carrier-recovery loop, and LDPC decoder. The device is implemented in a standard CMOS process and supports both legacy DVB-S (QPSK) and the second-generation DVB-S2 standard with multi-level APSK constellations, giving receiver manufacturers a single silicon platform for legacy SD, HD, and UHD satellite transponder decoding.
Typical applications include dual-tuner satellite set-top boxes, hybrid satellite/terrestrial DVRs, professional satellite receiver cards, and television sets with built-in DVB-S2 tuners. The dual-channel architecture is particularly suited to watch-and-record scenarios where one tuner is dedicated to a live channel while the second records a different transponder simultaneously. The integrated DiSEqC interface also makes the part a natural fit for multi-LNB dish installations such as motorised DiSEqC 1.2 / 2.x setups.
When designing with the SI21662-B22-GMR, provide a clean 3.3 V regulated analog rail (LDO) and short, impedance-controlled IF traces from the tuner output, because the demodulator's symbol-timing recovery is sensitive to phase noise on both the IF and the reference clock. Use a 100 nF decoupling capacitor on every VDD pin and a single 10 uF bulk capacitor on the 3V3 supply pin.
This page synthesizes distributor pricing, drop-in Si2166x family alternatives, pinout guidance, and design notes that go beyond what the manufacturer datasheet alone provides for the SI21662-B22-GMR.
直接替換替代品，適用於 SI21662-B22-GMR — 相同封裝，腳位對腳位相容。需重新設計 PCB 的不同封裝零件不列入。
SI21662-B40-GMR
✅ 直接替換 ⚠️ 規格未經驗證📋 參考替代品（不在目錄中）
SI21662-B22-GM
✅ 直接替換📋 參考替代品（不在目錄中）
SI21662C-B22-GMR
✅ 直接替換 ⚠️ 規格未經驗證📋 參考替代品（不在目錄中）
SI21662-B22-GMR 規格
| 功能 | Dual DVB-S/S2/DSS Digital Satellite TV Demodulator |
| Number of Channels | 2 (independent) |
| Standards Supported | DVB-S, DVB-S2, DSS |
| Modulation Schemes | QPSK, 8PSK, 16APSK, 32APSK |
| Forward Error Correction | LDPC + BCH (DVB-S2), Viterbi + Reed-Solomon (DVB-S, DSS) |
| Host Interface | I2C (Serial) |
| Transport Stream Output | Serial / Parallel / LVDS selectable |
| 供應電壓 | 3.3 V |
| 封裝 | 68-pin QFN (8x8 mm) |
| 安裝類型 | Surface Mount |
| 工作溫度 | -10 C to +70 C |
| DiSEqC Interface | DiSEqC 1.x / 2.x compatible |
| RoHS 狀態 | Compliant (Pb-free GMR suffix) |
| Manufacturing Status | Obsolete / Last Time Buy |
SI21662-B22-GMR 68-pin qfn (8x8 mm) 腳位配置指南
SI21662-B22-GMR（68-pin qfn (8x8 mm) 封裝）的腳位配置。 腳位編號、功能與連接圖定義於製造商資料手冊中。請參閱該手冊以取得確切的封裝尺寸與焊接指引。
無詳細腳位定義資料： SI21662-B22-GMR.
請參閱 資料表 以查看完整腳位配置。
典型應用
SI21662-B22-GMR 適用於 6 應用s: Dual-Tuner Satellite Set-Top Box, Satellite + Terrestrial Hybrid DVR, Professional Satellite Receiver Card (PC/Embedded), Integrated Digital Television (iDTV) with Satellite, Multi-LNB Motorised Satellite Receiver, Cable / IPTV Headend DVB-S2 Demod Card.
Dual-Tuner Satellite Set-Top Box
The SI21662-B22-GMR's two independent DVB-S/DVB-S2/DSS demodulators share one 68-QFN package, making it ideal for watch-and-record set-top boxes that must tune two transponders simultaneously. According to Skyworks datasheet, each demodulator handles QPSK, 8PSK, 16APSK and 32APSK constellations with on-chip LDPC plus BCH FEC, so a single Si21662 plus tuner pair replaces what previously required two demodulator ICs. This reduces PCB area, BOM cost, and the host MPU's interrupt load compared to dual silicon implementations.
推薦
Satellite + Terrestrial Hybrid DVR
Hybrid DVR designs that record a DVB-S2 transponder while simultaneously streaming a DVB-T/T2 broadcast benefit from the SI21662-B22-GMR's dual demodulators in a single package. The Si21662 channel-A handles the satellite IF while channel-B is reserved for the terrestrial tuner stream, allowing two-record + watch-live operation. DiSEqC 1.x / 2.x support also simplifies multi-LNB dishes. Power dissipation is roughly 0.6 W under full dual-channel load, so the 68-QFN exposed pad is adequate without an external heatsink.
推薦
Professional Satellite Receiver Card (PC/Embedded)
Professional DVB-S2 receiver cards for broadcast monitoring and head-end transcoding need deterministic dual-channel decoding for two carriers on the same or different transponders. The SI21662-B22-GMR delivers two fully independent MPEG-TS outputs via its configurable serial, parallel or LVDS TS interface, allowing direct connection to PCIe bridge FPGA or SoC inputs. The 3.3 V single supply and 68-QFN footprint also simplify integration on a compact receiver card.
推薦
Integrated Digital Television (iDTV) with Satellite
Modern iDTV designs with built-in satellite tuners use the SI21662-B22-GMR to decode DVB-S2 alongside the panel's main SoC. The chip's I2C interface integrates transparently into the TV's main MCU control loop, and its small 8x8 mm 68-QFN package fits behind the panel's tuner can. Built-in DiSEqC 1.x / 2.x compatibility supports motorised dish installations common in Europe. Designers also pair the Si21662 with a low-noise LDO such as PTL432LIBQDBZR for the analog 3.3 V rail to maximise CNR margin on weak transponders.
推薦
Multi-LNB Motorised Satellite Receiver
DiSEqC 1.2 / 2.3 motorised dish systems require demodulators with hardware handshake support for bidirectional LNB commands. The SI21662-B22-GMR's integrated DiSEqC interface plus its dual demodulators are well matched to motorised satellite receivers that must retune channel B to a new transponder while channel A is still receiving a TV programme. The 3.3 V single-rail operation simplifies the LNB power supply tree in these often space-constrained remote-control units.
推薦
Cable / IPTV Headend DVB-S2 Demod Card
Cable/IPTV headend systems that redistribute satellite programming over DOCSIS or IPTV backbones use the SI21662-B22-GMR to receive multiple DVB-S2 streams per slot, then forward MPEG-TS to a transcoder. The dual-channel single-package implementation doubles channel density per blade compared with two separate demodulator ICs, simplifying thermal management and backplane routing. The exposed-pad 68-QFN also dissipates the typically 0.6 W dual-channel load with only a moderate copper pour.
推薦
推薦產品摘要
工程參考資料，適用於 SI21662-B22-GMR — 比較、設計指引及合規資訊。
選型指南
與替代品比較
| 參數 | 本產品 | SI21662-B40-GMR | SI21662-B22-GM | SI2166-B22-GMR | SI21662C-B22-GMR |
|---|---|---|---|---|---|
| Brand | Skyworks | Skyworks | Skyworks | Skyworks | Skyworks |
| Package | 68-QFN (8x8 mm) | 68-QFN (8x8 mm) - same | 68-QFN (8x8 mm) - same | 48-QFN (7x7 mm) | 68-QFN (8x8 mm) - same |
| Number of Demodulator Channels | 2 (dual) | 2 (dual) | 2 (dual) | 1 (single) | 2 (dual) |
| Standards Supported | DVB-S / DVB-S2 / DSS | DVB-S / DVB-S2 / DSS | DVB-S / DVB-S2 / DSS | DVB-S / DVB-S2 / DSS | DVB-S / DVB-S2 / DSS |
| 32APSK Support | Yes | Yes | Yes | Yes | Yes |
| Host Interface | I2C | I2C | I2C | GPIO, I2C | I2C |
| Supply Voltage | 3.3 V | 3.3 V | 3.3 V | 3.3 V | 3.3 V |
| DiSEqC Support | 1.x / 2.x | 1.x / 2.x | 1.x / 2.x | 1.x / 2.x | 1.x / 2.x |
| Lifecycle Status | Obsolete | Last Time Buy | Obsolete | Obsolete | Active (verify) |
主要差異化特點
- Dual-channel DVB-S/S2/DSS in a single 68-QFN package (對比SI2166-B22-GMR)
- 68-QFN (8x8 mm) standard pinout shared across Si21662 family (對比SI21662C-B22-GMR (C-revision))
- 32APSK plus 16APSK DVB-S2 support (對比DVB-S-only legacy demodulators)
- On-chip DiSEqC 1.x / 2.x interface (對比External DiSEqC transceivers)
設計說明
Estimated: The SI21662-B22-GMR draws roughly 0.6 W total under full dual-channel DVB-S2 32APSK load, so a 3.3 V regulator rated at least 600 mA is recommended (1 A headroom preferred for in-rush). Use a low-noise LDO such as PTL432LIBQDBZR for the demodulator analog rail to maximise CNR. Place a 100 nF decoupling capacitor within 3 mm of every VDD pin and a single 10 uF bulk capacitor on the 3V3 supply near the IC. Power-rail noise above 5 mVpp can degrade 32APSK acquisition margin, so avoid sharing the demodulator rail with digital switching circuits.
Keep IF input traces from the tuner to the SI21662 matched in length (within 1 mm) and impedance-controlled to 100 ohm differential per Skyworks reference layout. According to Skyworks datasheet, the IF inputs (IF1IN+/-, IF2IN+/-) must be AC-coupled with 10 nF capacitors placed close to the IC pads. Route I2C and TS outputs away from IF traces to avoid coupled phase noise. The exposed pad (EPAD) must be soldered to a continuous ground plane for thermal dissipation and electrical return.
Do not substitute the SI2166-B22-GMR (single-channel, 48-QFN) directly for the SI21662-B22-GMR (dual-channel, 68-QFN) - they are not pin-compatible because the package and pinout differ. Per Skyworks ordering code convention, the trailing 'R' on GMR denotes Tape-and-Reel packaging of 2500 units; dropping the 'R' (SI21662-B22-GM) gives Tray packaging for prototype builds. Always reference Si2166x family firmware migration notes from Skyworks support when updating to current silicon, since older firmware can have 32APSK acquisition issues on very low CNR transponders.
Estimated: The reference clock (CLK_IN or external XTAL) drives the SI21662's symbol-timing recovery, so its phase noise must stay below -110 dBc/Hz at 10 kHz offset per Skyworks reference design. A clipped sine TCXO or low-jitter crystal plus a series ferrite bead typically gives adequate margin. Long I2C or TS traces exceeding 50 mm should be source-terminated with 33 ohm to suppress reflections on the rising edge. Add a 4.7 kohm pull-up to 3.3 V on SDA and SCL, matching the I2C standard.
合規資訊
GMR suffix denotes Pb-free matte-tin plating per RoHS. AEC-Q100 is not applicable - this is a consumer video processing IC, not an automotive part. REACH, halogen-free and conflict-minerals status: not stated in current distributor data, so marked unknown.
