THS6062CD - 100 MHz Low-Noise ADSL Receiver | Texas Instruments
MPN： THS6062CD ✓ 啟用中THS6062CD 概覽
A differential receiver is an amplifier that responds to the voltage difference between two input terminals rather than to either input independently. This differential architecture is part of the operational-amplifier hierarchy and is widely used in communications interfaces, analog-to-digital converter drivers, line receivers, and signal-conditioning systems. By rejecting common-mode signals, a differential receiver can preserve small information-bearing signals in noisy environments. The THS6062 is positioned specifically for ADSL receiver front ends, where low noise and wide bandwidth are important because the received signal must retain both signal amplitude and timing information.
The THS6062 combines 1.6 nV/√Hz voltage-noise density with a gain bandwidth of 100 MHz. Its typical slew rate is 100 V/µs, and the manufacturer identifies the device as stable for gains of 2 or greater, including inverted operation at gain -1. A typical output-drive current of 90 mA supports demanding line-receiver applications. Its low distortion figures include THD of -72 dBc at 1 MHz and -90 dBc at 1 MHz under the cited operating conditions.
The device accepts a wide range of supply voltages, including single 5 V operation and dual ±5 V operation; ±15 V is also identified as a typical operating configuration. Its dual-channel arrangement allows one package to service two differential receiver paths. The combination of differential input handling, high bandwidth, low voltage noise, and high slew rate makes the THS6062 suitable for ADSL line-interface circuitry and other wideband applications requiring accurate signal amplification.
Typical uses include ADSL customer-premises equipment, differential ADC input stages, communications transceivers, video and instrumentation front ends, and balanced line receivers. In these systems, the THS6062 can sit between a transformer or balanced line and the codec, ADC, or subsequent signal-processing block. The wide bandwidth supports high-data-rate signals, while the 1.6 nV/√Hz noise density helps preserve low-amplitude information.
Designers should preserve the receiver’s low-noise behavior by keeping input and feedback traces short, providing clean ground references, and avoiding unnecessary parasitic capacitance around the pins. The manufacturer’s pin description and typical application circuits should be followed for supply decoupling and gain-setting resistors. The 8-pin SOIC footprint also supports conventional surface-mount assembly, although exposed-pad thermal guidance is not applicable to this package.
This page combines manufacturer specifications, verified cross-reference candidates, same-package comparisons, and application-focused design guidance. These resources make it easier to evaluate the THS6062CD for ADSL, communications, instrumentation, and other high-speed differential receiver designs before committing it to a PCB layout.
直接替換替代品，適用於 THS6062CD — 相同封裝，腳位對腳位相容。需重新設計 PCB 的不同封裝零件不列入。
此系列的變體
與下列產品可直接替換的同系列型號： THS6062CD （相同外形與佔位） — 差異在於 Package.
THS6062CDG4
✅ 直接替換📋 參考替代品（不在目錄中）
THS6062CDR
✅ 直接替換📋 參考替代品（不在目錄中）
THS6062IDG4
✅ 直接替換📋 參考替代品（不在目錄中）
THS6062CD 最大額定值與電氣特性
| Receiver Configuration | Dual differential receiver |
| Gain-Bandwidth Product | 100 MHz |
| Input Voltage-Noise Density | 1.6 nV/√Hz |
| Slew Rate | 100 V/µs |
| Typical Output Drive Current | 90 mA |
| Minimum Stable Gain | 2 V/V |
| Inverted Stable Gain | -1 V/V |
| THD at 1 MHz | -72 dBc |
| THD at 1 MHz, Alternate Condition | -90 dBc |
| Single-Supply Operation | 5 V |
| Dual-Supply Operation | ±5 V |
| Typical Maximum Supply Configuration | ±15 V |
| Number of Channels | 2 |
| 腳位數 | 8 |
| 封裝 | 8-pin SOIC, 3.90 mm width |
| 安裝類型 | Surface mount |
| Amplifier Architecture | Voltage feedback |
| Target Application | ADSL data communication |
THS6062CD 8-pin soic, 3.90 mm width 腳位配置指南
THS6062CD（8-pin soic, 3.90 mm width 封裝）的腳位配置。 此類比元件具有輸入、輸出與電源腳位。偏移歸零、補償與致能腳位配置請參閱製造商資料表。適用於訊號調理與放大器電路。
無詳細腳位定義資料： THS6062CD.
請參閱 資料表 以查看完整腳位配置。
典型應用
THS6062CD 適用於 6 應用s: ADSL Receiver Front End, Balanced Communications Line Receiver, High-Speed Differential ADC Input, Precision Instrumentation Amplifier Stage, Balanced Audio and Video Interface, Test and Measurement Signal Conditioning.
ADSL Receiver Front End
The THS6062CD fits an ADSL line-receiver stage because it combines a 1.6 nV/√Hz input-noise density with 100 MHz bandwidth. Place the dual receiver between the balanced line interface and the ADSL codec or downstream converter, using stable voltage-feedback gains of 2 or greater. Its 100 V/µs slew rate preserves large-signal behavior, while the low-noise specification helps retain weak signal information. The 8-pin SOIC package also supports automated surface-mount assembly and compact board partitioning.
推薦
Balanced Communications Line Receiver
For balanced communications links, the THS6062CD provides differential amplification with 100 MHz bandwidth, 90 mA typical output drive, and a 100 V/µs slew rate. Connect each receiver channel to the appropriate positive and negative line-side inputs, then return the balanced signal toward the codec or data-processing block. Differential operation helps suppress common-mode disturbance, while the wide bandwidth accommodates high-rate signals. Gain resistors and compensation values should follow the manufacturer’s typical receiver configuration.
推薦
High-Speed Differential ADC Input
The THS6062CD can condition a differential signal before a high-speed ADC because its 100 MHz gain-bandwidth product and 100 V/µs slew rate support rapid signal transitions. Its 1.6 nV/√Hz noise density is particularly useful when the converted signal is small relative to the ADC’s full-scale range. Use a stable gain, keep the feedback network compact, and verify the amplifier’s output swing against the ADC input range. Decoupling and grounding are critical at these bandwidths.
推薦
Precision Instrumentation Amplifier Stage
The THS6062CD is useful in instrumentation circuits that require low input noise without giving up wide bandwidth. Its 1.6 nV/√Hz voltage-noise density supports low-level sensor and laboratory signal paths, while dual channels can process two related measurements. Configure each amplifier at a stable gain of 2 or greater and check common-mode range, output swing, and distortion under the expected signal amplitude. Short feedback tracks and a quiet ground plane minimize added noise and instability.
推薦
Balanced Audio and Video Interface
The dual THS6062CD can serve balanced audio or video interface channels where low noise, wide bandwidth, and moderate output drive are required. Its 100 MHz bandwidth handles fast edge content, while the 100 V/µs slew rate improves large-signal response compared with slower general-purpose amplifiers. Use the two channels independently or for related differential paths. Verify output swing, input common-mode range, and the stability network required by the selected closed-loop gain.
推薦
Test and Measurement Signal Conditioning
The THS6062CD can condition moderate-amplitude, high-speed signals in oscilloscope front ends and electronic test equipment. The 1.6 nV/√Hz noise density lowers the amplifier’s input-referred contribution, and the 90 mA typical output drive provides useful capability for driving downstream measurement circuitry. The 100 MHz bandwidth supports broad signal inspection, but the complete measurement bandwidth also depends on the source impedance, probe network, ADC, and PCB parasitics. Maintain short, controlled-impedance paths.
推薦
推薦產品摘要
工程參考資料，適用於 THS6062CD — 比較、設計指引及合規資訊。
選型指南
與替代品比較
| 參數 | 本產品 | THS6062CDG4 | THS6062CDR | THS6062IDG4 |
|---|---|---|---|---|
| Package | 8-pin SOIC | 8-pin SOIC | 8-pin SOIC | 8-pin SOIC |
| Brand | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments |
| Gain-Bandwidth Product | 100 MHz | 100 MHz | 100 MHz | 100 MHz |
| Input Voltage-Noise Density | 1.6 nV/√Hz | 1.6 nV/√Hz | 1.6 nV/√Hz | 1.6 nV/√Hz |
| Slew Rate | 100 V/µs | 100 V/µs | 100 V/µs | 100 V/µs |
| Typical Output Drive Current | 90 mA | 90 mA | 90 mA | 90 mA |
主要差異化特點
- Low-noise differential reception in an 8-pin SOIC (對比THS6062CDR)
- Wideband large-signal capability (對比THS6062CDG4)
- Aircraft and high-speed receiver performance (對比THS6062IDG4)
設計說明
Route each differential pair as a compact, symmetric pair with continuous return paths and minimal stub lengths. Place input and feedback components close to the associated pins to reduce parasitic capacitance and feedback-loop area. Keep supply bypass capacitance adjacent to the power pins and connect it to a low-impedance ground plane. At 100 MHz bandwidth, small loop areas can materially affect stability and unwanted coupling.
Check input common-mode voltage, output swing, gain, and stability against the manufacturer limits before finalizing the receiver network. The THS6062 is stable at gains of 2 or greater and supports gain -1 operation, but every closed-loop configuration should be evaluated with its actual feedback impedance and source termination. Avoid placing large capacitive loads directly on the outputs; isolate them with a suitable buffer when necessary.
Do not treat a generic low-noise dual operational amplifier as an automatic replacement. A valid substitute must preserve the differential input behavior, 8-pin SOIC footprint, 100 MHz-class bandwidth, 1.6 nV/√Hz-class noise, stable-gain conditions, supply range, and output-drive capability. After fitting a substitute, recheck distortion, common-mode range, thermal behavior, and timing margin across the complete signal path.
合規資訊
No specific RoHS, REACH, AEC-Q100, lead-free, halogen-free, or conflict-minerals declarations were identified for this ordering code. Compliance must be confirmed for the exact production lot and package.