TPS3106K33DBVR - 3.3V Ultra-Low Iq Voltage Supervisor | TI
MPN： TPS3106K33DBVR ✓ 啟用中TPS3106K33DBVR 概覽
A voltage supervisor (also called a supply voltage monitor or reset IC) is a type of power management IC that holds a host processor in reset whenever the supply voltage is below a defined minimum or below a threshold for longer than the configured delay. Voltage supervisors sit between a power rail and a digital controller, generating an asserted-low reset signal during power-up, power-down, and brownout events to prevent code execution from corrupted memory or undefined logic states; in the broader hierarchy they are members of the supervisor / reset IC family inside the power management category.
Key features include a 1.1 µA typical quiescent current, an open-drain RESET output suitable for wired-OR multi-rail monitoring, an internal 130 ms reset delay timer to provide brownout immunity, and a manual reset (MR) input that can force RESET low regardless of the sensed voltage. The TPS3106 family also includes the TPS3103 (active-low open-drain) and TPS3110 (active-low push-pull) variants for architectural flexibility. The wide hysteresis and tight threshold accuracy reduce nuisance resets in battery-powered designs.
The TPS3106 uses a precision bandgap reference combined with a comparator and an integrated timing network to deliver reliable voltage monitoring. The device operates from supplies as low as 0.9 V, making it suitable for single-cell battery and energy-harvesting rails. Its open-drain RESET topology allows multiple supervisors to be combined into a single interrupt, useful in multi-rail systems where any one rail's failure should hold the host in reset.
Typical applications include microcontroller and DSP reset supervision in portable electronics, battery-powered IoT sensors, industrial PLC and factory automation controllers, FPGA configuration rail monitoring, automotive infotainment sub-system monitoring (non-safety-rated), and energy-harvesting energy management modules. The part is well suited for any compact 3.3 V (or lower) digital system requiring robust power-on-reset and brownout supervision.
When designing with this device, ensure the pull-up resistor on the open-drain RESET pin is sized appropriately for the load capacitance to meet the desired reset rise-time. The MR pin can be tied to VDD or left floating if unused, but should not be left floating in noisy environments where it could couple transient noise into the reset comparator.
This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet.
直接替換替代品，適用於 TPS3106K33DBVR — 相同封裝，腳位對腳位相容。需重新設計 PCB 的不同封裝零件不列入。
此系列的變體
與下列產品可直接替換的同系列型號： TPS3106K33DBVR （相同外形與佔位） — 差異在於 Package, Function, MSL Level, Manual Reset Input, Operating Temperature Range.
TPS3106K33DBVT
✅ 直接替換📋 參考替代品（不在目錄中）
TPS3110K33DBVR
✅ 直接替換📋 參考替代品（不在目錄中）
TPS3103K33DBVR
✅ 直接替換📋 參考替代品（不在目錄中）
TPS3106K33DBVRG4
✅ 直接替換 ⚠️ 規格未經驗證📋 參考替代品（不在目錄中）
TPS3106K33DBVR 規格
| 功能 | Voltage supervisor / supply monitor |
| 拓撲 | Open-drain RESET, active-low |
| Monitored Voltage Range | 0.9 V to 3.6 V |
| Reset Threshold (K33) | 2.941 V (typical) |
| Reset Output Type | Active-low, open-drain |
| Reset Delay Time | 130 ms (typical) |
| Operating Supply Current (Iq) | 1.1 µA (typical) |
| Number of Supervisors | 1 |
| Manual Reset Input | Yes (MR, active-low) |
| 封裝 | SOT-23-6 (DBV) |
| 工作溫度範圍 | -40 °C to +85 °C |
| Power Dissipation (max) | 437 mW |
| 安裝類型 | Surface Mount |
| MSL 等級 | Level-1 (per JEDEC J-STD-020) |
| RoHS 狀態 | Compliant |
| Lead Free | Yes |
TPS3106K33DBVR 腳位配置
| 腳位 1 | GND — Ground return for the device and timing network |
| 腳位 2 | MR — Manual reset input, active-low, internally pulled high; drive low to force RESET low |
| 腳位 3 | RESET — Active-low reset output, open-drain; requires external pull-up to VDD or logic supply |
| 腳位 4 | VDD — Supply voltage input, 0.9 V to 3.6 V; monitored 3.3 V rail for K33 variant |
| 腳位 5 | NC — Not connected (per datasheet, pin reserved) |
| 腳位 6 | CT — Timing capacitor connection; internal fixed 130 ms delay, pin may be NC on -DBV variant |
典型應用
TPS3106K33DBVR 適用於 6 應用s: Microcontroller / DSP Reset Supervision, Battery-Powered IoT Sensor Modules, Industrial PLC and Factory Automation Controllers, FPGA Configuration Rail Monitoring, Energy-Harvesting Power-Management Modules, Automotive Infotainment Sub-System Monitoring.
Microcontroller / DSP Reset Supervision
The TPS3106K33DBVR is purpose-built for circuit initialization in 3.3 V microcontroller and DSP systems. Place the device between the 3.3 V LDO output and the host's RESET pin; its 2.941 V threshold and 130 ms delay ensure the MCU stays in reset long enough for VDD and clock to stabilize, preventing code corruption from power-on glitches. The 1.1 µA typical Iq contributes negligible load to the regulated rail, and the SOT-23-6 footprint fits beneath the MCU on dense boards.
推薦
Battery-Powered IoT Sensor Modules
Ultra-low Iq of 1.1 µA makes the TPS3106K33DBVR ideal for battery-powered wireless sensor nodes powered by coin cells or energy harvesters. The supervisor holds the sensor MCU in reset when the battery droops below 2.941 V, protecting FLASH memory from low-voltage writes. Combined with a low-Iq LDO upstream, total idle supervisor+regulator drain can remain under 5 µA, extending multi-year coin-cell runtime in periodic-reporting IoT duty cycles.
推薦
Industrial PLC and Factory Automation Controllers
In 24 V→3.3 V PLC systems, the TPS3106K33DBVR monitors the downstream digital rail and asserts RESET during brownouts from motor inrush or relay switching. Its 2.941 V ±2% threshold accuracy across -40 °C to +85 °C prevents nuisance resets during transient dips, while the open-drain output wire-ORs with other rail supervisors to a single host reset net. The industrial-grade temperature range and 437 mW power dissipation envelope suit DIN-rail cabinets and factory-floor enclosures.
推薦
FPGA Configuration Rail Monitoring
FPGAs require deterministic POR sequencing of their 3.3 V configuration supply to avoid corrupted bitstream loading. The TPS3106K33DBVR holds the FPGA's INIT_B or nCONFIG pin in reset until VDD > 2.941 V for >130 ms, ensuring all configuration logic is fully powered before bitstream download begins. Its SOT-23-6 footprint pairs well with high-density BGA FPGAs where PCB real-estate is constrained, and the open-drain output allows combining the 1.0 V, 1.8 V, and 3.3 V supervisors on one rail-OR'd reset.
推薦
Energy-Harvesting Power-Management Modules
Solar, thermoelectric, and vibration energy harvesters produce variable, low-current rails that often drop below MCU minimum voltages. The TPS3106K33DBVR holds downstream circuitry in reset whenever the harvested rail sags under 2.941 V, and the 0.9 V minimum operating supply lets it stay alive even from depleted supercaps. The 1.1 µA Iq is small enough that it can run directly from a few µA of harvested current, enabling graceful power-fail behavior in self-powered IoT nodes.
推薦
Automotive Infotainment Sub-System Monitoring
In 12 V battery-powered automotive infotainment, the TPS3106K33DBVR can supervise downstream 3.3 V peripheral rails that are not safety-critical (e.g., display backlight logic, secondary MCU rails). The device's -40 °C to +85 °C operating range covers most cabin temperatures; for underhood or AEC-Q100 requirements, the AEC-Q100-qualified TPS3106E-Q1 or TPS3110-Q1 variants are recommended over this commercial-grade part.
推薦
推薦產品摘要
工程參考資料，適用於 TPS3106K33DBVR — 比較、設計指引及合規資訊。
選型指南
與替代品比較
| 參數 | 本產品 | TPS3106K33DBVT | TPS3110K33DBVR | TPS3103K33DBVR | TPS3106K33DBVRG4 |
|---|---|---|---|---|---|
| Package | SOT-23-6 (DBV) | SOT-23-6 (DBV) - same | SOT-23-6 (DBV) - same | SOT-23-6 (DBV) - same | SOT-23-6 (DBV) - same |
| Brand | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments |
| Reset Threshold | 2.941 V (K33) | 2.941 V (K33) | 2.941 V (K33) | 2.941 V (K33) | 2.941 V (K33) |
| RESET Output Type | Open-drain, active-low | Open-drain, active-low | Push-pull, active-low | Open-drain, active-low | Open-drain, active-low |
| Reset Delay Time | 130 ms (typ) | 130 ms (typ) | 130 ms (typ) | 130 ms (typ) | 130 ms (typ) |
| Quiescent Current (Iq) | 1.1 µA (typ) | 1.1 µA (typ) | 1.1 µA (typ) | 1.1 µA (typ) | 1.1 µA (typ) |
| Operating Voltage Range | 0.9 V to 3.6 V | 0.9 V to 3.6 V | 0.9 V to 3.6 V | 0.9 V to 3.6 V | 0.9 V to 3.6 V |
| Operating Temperature | -40 °C to +85 °C | -40 °C to +85 °C | -40 °C to +85 °C | -40 °C to +85 °C | -40 °C to +85 °C |
| Packaging Variant | Reel of 3000 (R suffix) | Reel of 250 (T suffix) | Reel of 3000 (R suffix) | Reel of 3000 (R suffix) | Reel of 3000, Pb-free green (G4) |
主要差異化特點
- Ultra-low 1.1 µA quiescent current suited for battery and energy-harvested rails (對比Standard reset supervisor with 10–50 µA Iq)
- Pin-for-pin identical to TPS3110K33DBVR except for output topology (對比TPS3110K33DBVR)
- SOT-23-6 footprint with all 6 pins used (no internal NC dummies) (對比Larger supervisors in SOT-23-5 or DPAK)
設計說明
The TPS3106K33DBVR draws a typical 1.1 µA quiescent current from VDD and should be supplied from the regulated 3.3 V rail it monitors, not directly from battery, to avoid draining back-up cells. Place a 0.1 µF ceramic bypass capacitor within 5 mm of the VDD pin to filter switching noise and keep Iq stable across load steps. If the rail is sourced from a low-current LDO, ensure the supervisor draws less than 1% of the LDO's nominal load.
Open-drain RESET output requires an external pull-up resistor between 10 kΩ and 100 kΩ to VDD or the downstream logic supply; omitting this resistor results in RESET never deasserting. The MR pin must not be left floating in noisy environments — tie it to VDD through a 100 kΩ resistor if not driven by an external signal. Note that the -DBV SOT-23-6 variant does not expose an external timing capacitor; the 130 ms delay is internally fixed and not user-adjustable.
SOT-23-6 footprint should use 1-oz copper pads with thermal relief spokes and a generous ground pour beneath to handle the 437 mW peak dissipation in worst-case short-circuit reset scenarios. Keep reset trace short and away from switching regulator feedback lines to avoid coupling noise that could trigger spurious resets. For multi-rail systems using wire-ORed open-drain RESETs, place each supervisor within 10 mm of its monitored rail's bulk capacitor.
合規資訊
RoHS compliant per TI product page; SOT-23-6 MSL-1 per JEDEC J-STD-020. Commercial-grade (-40 °C to +85 °C), not AEC-Q100 qualified; for automotive use, select TPS3106E-Q1 or TPS3110-Q1 family variants.
